MODULE - 6

Design of FSM
 State diagram
• The state diagram is the pictorial representation of the behavior of
sequential circuits
 State diagram
• The state diagram is the pictorial representation of the behavior of
sequential circuits
• It clearly shows the transition of states from the present state to the next
state and output for a corresponding input
• In addition to graphical symbols, tables or equations, flip-flops can also be
represented graphically by a state diagram.
• In this diagram, a state is represented by a circle, and the transition
between states is indicated by directed lines (or arcs) connecting the
circles
• The binary number inside each circle identifies the state the circle
represents
• The directed lines are labeled with two binary numbers separated by a
slash (/).
• The input value that causes the state transition is labeled first.
• he number after the slash symbol / gives the value of the output
 State table
• The state diagram is the pictorial representation of the behavior of
sequential circuits
• The information contained in the state diagram is transformed into a table
called a state table or state synthesis table
•  Although the state diagram describes the behavior of the sequential
circuit, in order to implement it in the circuit, it has to be transformed into
the tabular form
• The state table representation of a sequential circuit consists of three
sections labeled present state, next state and output 
• The present state designates the state of flip-flops before the occurrence of
a clock pulse.
• The next state shows the states of flip-flops after the clock pulse, and
• Output section lists the value of the output variables during the present
state
 State table
q – Present state & q* - Next state
x – Input & Z - output
 Finite State Machines
• Finite state machines (FSMs) are the heart of most of digital
design
• The basic idea of an FSM is to store a sequence of different
unique states and transition between them depending on the
values of the inputs and the current state of the machine

• The FSM can be of two types:

• Moore (where the output of the state machine is purely
dependent on the state variables)

• Mealy (where the output can depend on the current state

variable values and the input values)
Finite State Machines
MEALY MODEL
 MEALY MODEL

 There are two types of finite state machines that generate output Mealy
Machine & Moore machine

 A Mealy Machine is an FSM whose output depends on the present state as well
as the present input
 MEALY MODEL
MEALY MODEL
 A sequence detector is a sequential circuit that outputs 1 when a
particular pattern of bits sequentially arrives at its data input.

 The data input receives the input sequence and the clock is used to
synchronize the functionality of the circuit.

 If you analyse the input and output sequences, only when the last
4-bits of the input sequence are 1001 the output turn to 1, then it
turns back to 0.
 MEALY MODEL
MEALY MODEL
 Types of sequence detector: Overlapping and Non-overlapping.

 In an overlapping sequence detector, the final bits of one sequence

becomes the start of next sequence. Example - bit pattern“1001”,
Inputs: 11100110100100110
Outputs: 00000100000100100

 In Non-overlapping sequence detector, the last bit of one sequence

can’t considered as first bit of the next sequence i.e it resets itself
to the start state when the sequence has been detected. Example -
bit pattern“1001”:
Inputs: 11100110100100110
Outputs: 00000100000100000
 MEALY MODEL
MEALY MODEL – SEQUENCE DETECTOR EXAMPLES
 MEALY MODEL
MEALY MODEL – SEQUENCE DETECTOR EXAMPLES

11011 sequence detector without 11011 sequence detector

overlapping with overlapping
 MEALY MODEL
STEPS TO DESIGN MEALY MODEL - SEQUENCE DETECTOR

1. Draw the state diagram

2. Construct state table
3. Construct state table with state values
4. Determine excitation table
5. Construct the transition table
6. K-Map simplification procedures for driving expressions
7. Draw the logic diagram
 MEALY MODEL – EXAMPLE-1
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
1. Draw the state diagram (Overlapping)

1/0 1/1
0/0

A 1/0
B 0/0
C

0/0
 MEALY MODEL – EXAMPLE-1
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
2. Construct state table
Present Next
State Input State Output
A 0 A 0
A 1 B 0
B 0 C 0
B 1 B 0
C 0 A 0
C 1 B 1
NOTE: For state C when input X=1 then it move to state B and produce the
output as 1. For all other cases the output remains 0.
 MEALY MODEL – EXAMPLE-1
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
3. Construct state table with state values
Present Next
State Input State Output
Q1 Q0 X Q1 Q0 Z
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 1 0 0
0 1 1 0 1 0
1 0 0 0 0 0
1 0 1 0 1 1
 MEALY MODEL – EXAMPLE-1
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
4. Determine excitation table (D-Flip Flop)
 MEALY MODEL – EXAMPLE-1
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
5. Construct the transition table
Present Next Flip-Flop
State Input State inputs Output
Q1 Q0 X Q1 Q0 D1 D0 Z
0 0 0 0 0 0 0 0
0 0 1 0 1 0 1 0
0 1 0 1 0 1 0 0
0 1 1 0 1 0 1 0
1 0 0 0 0 0 0 0
1 0 1 0 1 0 1 1
NOTE: Number of flip flops required for the design is calculated based on number of
state. In this case number state is 3, so we need 2 flip flop for the design (2 2=4).
 MEALY MODEL – EXAMPLE-1
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
6. K-Map simplification procedures for driving expressions
Q0X Q0X
00 01 11 10 00 01 11 10
Q1 Q1
0 0 0 0 1 0 0 1 1 0
1 0 0 X X 1 0 1 X X
D1 = Q0X’
D0 = X
NOTE: In K-Map, we must Q0X
assume don’t care “x” 00 01 11 10
values for the remaining Q1
unknown states. In this 0 0 0 0 0
case “11” state is unknown Z = Q1X
state and its output is “X”
irrespective of input is 0
1 0 1 X X
or 1.
 MEALY MODEL – EXAMPLE-1
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
7. Draw the logic diagram

D1 = Q0X’
D0 = X
Z = Q1X
 MEALY MODEL – EXAMPLE-2
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
(Non-Overlapping)
1. Draw the state diagram
1/1
0/0 1/0

A 1/0
B 0/0
C

Example:
0/0 Inputs: 0110101011001
Outputs: 0000100010000
 MEALY MODEL – EXAMPLE-2
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
(Non-Overlapping)
2. Construct state table
Present Next
State Input State Output
A 0 A 0
A 1 B 0
B 0 C 0
B 1 B 0
C 0 A 0
C 1 A 1
NOTE: For state C when input X=1 then it move to state A and produce the
output as 1. For all other cases the output remains 0.
 MEALY MODEL – EXAMPLE-2
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
(Non-Overlapping)
3. Construct state table with state values
Present Next
State Input State Output
Q1 Q0 X Q1 Q0 Z
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 1 0 0
0 1 1 0 1 0
1 0 0 0 0 0
1 0 1 0 0 1
 MEALY MODEL – EXAMPLE-2
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
(Non-Overlapping)
4. Determine excitation table (D-Flip Flop)
 MEALY MODEL – EXAMPLE-2
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
(Non-Overlapping)
5. Construct the transition table
Present Next Flip-Flop
State Input State inputs Output
Q1 Q0 X Q1 Q0 D1 D0 Z
0 0 0 0 0 0 0 0
0 0 1 0 1 0 1 0
0 1 0 1 0 1 0 0
0 1 1 0 1 0 1 0
1 0 0 0 0 0 0 0
1 0 1 0 0 0 0 1
NOTE: Number of flip flops required for the design is calculated based on number of
state. In this case number state is 3, so we need 2 flip flop for the design (2 2=4).
 MEALY MODEL – EXAMPLE-2
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
(Non-Overlapping)
6. K-Map simplification procedures for driving expressions
Q0X Q0X
00 01 11 10 00 01 11 10
Q1 Q1
0 0 0 0 1 0 0 1 1 0
1 0 0 X X 1 0 0 X X
D1 = Q0X’
D0 = Q1’X
NOTE: In K-Map, we must Q0X
assume don’t care “x” 00 01 11 10
values for the remaining Q1
unknown states. In this 0 0 0 0 0
case “11” state is unknown Z = Q1X
state and its output is “X”
irrespective of input is 0
1 0 1 X X
or 1.
 MEALY MODEL – EXAMPLE-2
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “101”
(Non-Overlapping)
7. Draw the logic diagram
D1 = Q0X’
D0 = Q1’X
Z = Q1X
 MEALY MODEL – EXAMPLE-3
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “1001”
1. Draw the state diagram
 MEALY MODEL – EXAMPLE-3
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “1001”
2. Construct state table

NOTE: For state D when input X=1 then it move to state B and produce the
output as 1. For all other cases the output remains 0.
 MEALY MODEL – EXAMPLE-3
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “1001”
3. Construct state table with state values
 MEALY MODEL – EXAMPLE-3
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “1001”
4. Determine excitation table
 MEALY MODEL – EXAMPLE-3
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “1001”
5. Construct the transition table

NOTE: Number of flip flops required for the design is calculated based on number of
states. In this case number state is 4, so we need 2 flip flop for the design (2 2=4).
 MEALY MODEL – EXAMPLE-3
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “1001”
6. K-Map simplification procedures for driving expressions

Q0X Q0X
00 01 11 10 00 01 11 10
Q1 Q1
0 0 0 0 1 0 X X X X
1 X X X X 1 0 1 1 1

J1 = Q0X’ K1 = X + Q0
 MEALY MODEL – EXAMPLE-3
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “1001”

Q0X Q0X
00 01 11 10 00 01 11 10
Q1 Q1
0 0 1 X X 0 X X 0 1

1 1 1 X X 1 X X 0 1

J0 = Q1+X K0 = X’
Q0X
00 01 11 10
Q1
0 0 0 0 0
Z = Q1Q0X
1 0 0 1 0
 MEALY MODEL – EXAMPLE-3
STEPS TO DESIGN MEALY MODEL – SEQUENCE DETECTOR “1001”
7. Draw the logic diagram
 MEALY MODEL – EXERCISE

Design an mealy based sequence detector to

detect the bit pattern of “1001” in non-
overlapping condition.
MOORE MODEL
 MOORE MODEL

 Moore machine is an FSM whose outputs depend on

only the present state.
 MOORE MODEL
STEPS TO DESIGN MOORE MODEL - SEQUENCE DETECTOR

1. Draw the state diagram

2. Construct state table
3. Construct state table with state values
4. Determine excitation table
5. Construct the transition table
6. K-Map simplification procedures for driving expressions
7. Draw the logic diagram
 MOORE MODEL – EXAMPLE-1
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
1. Draw the state diagram

1 1
0

A B C D
0 1 0 0 0 1 1

0
0
 MOORE MODEL – EXAMPLE-1
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
2. Construct state table
Present Next
State Input State Output
A 0 A 0
A 1 B 0
B 0 C 0
B 1 B 0
C 0 A 0
C 1 D 0
D 0 C 1
D 1 B 1
NOTE: In the given state table, the output will be 1 whenever its present
state is “D” irrespective of input X(0 or 1). For all other states output
remains 0.
 MOORE MODEL – EXAMPLE-1
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
3. Construct state table with state values
Present Next
State Input State Output
Q1 Q0 X Q1 Q0 Z
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 1 0 0
0 1 1 0 1 0
1 0 0 0 0 0
1 0 1 1 1 0
1 1 0 1 0 1
1 1 1 0 1 1
 MOORE MODEL – EXAMPLE-1
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
4. Determine excitation table
 MOORE MODEL – EXAMPLE-1
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
5. Construct the transition table
Present Next Flip-Flop
State Input State inputs Output
Q1 Q0 X Q1 Q0 D1 D0 Z
0 0 0 0 0 0 0 0
0 0 1 0 1 0 1 0
0 1 0 1 0 1 0 0
0 1 1 0 1 0 1 0
1 0 0 0 0 0 0 0
1 0 1 1 1 1 1 0
1 1 0 1 0 1 0 1
1 1 1 0 1 0 1 1
NOTE: Number of flip flops required for the design is calculated based on number of
state. In this case number state is 4, so we need 2 flip flop for the design (2 2=4).
 MOORE MODEL – EXAMPLE-1
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
6. K-Map simplification procedures for driving expressions
Q0X Q0X
00 01 11 10 00 01 11 10
Q1 Q1
0 0 0 0 1 0 0 1 1 0
1 0 1 0 1 1 0 1 1 0
D1 = Q0X’+Q1Q0’X
D0 = X
Q0X
NOTE: In Moore model, 00 01 11 10
Q1
0 0 0 0 0
the output expression (Z)
depends only on present
state values (Q1 & Q0) Z = Q1Q0
not on the input (X). 1 0 0 1 1
 MOORE MODEL – EXAMPLE-1
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
7. Draw the logic diagram
 MOORE MODEL – EXAMPLE-2
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
(Non-overlapping)
1. Draw the state diagram

1 1
0

A B C D
0 1 0 0 0 1 1

0
0
 MOORE MODEL – EXAMPLE-2
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
(Non-overlapping)
2. Construct state table
Present Next
State Input State Output
A 0 A 0
A 1 B 0
B 0 C 0
B 1 B 0
C 0 A 0
C 1 D 0
D 0 A 1
D 1 B 1
NOTE: In the given state table, the output will be 1 whenever its present
state is “D” irrespective of input X(0 or 1). For all other states output
remains 0.
 MOORE MODEL – EXAMPLE-2
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
(Non-overlapping)
3. Construct state table with state values
Present Next
State Input State Output
Q1 Q0 X Q1 Q0 Z
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 1 0 0
0 1 1 0 1 0
1 0 0 0 0 0
1 0 1 1 1 0
1 1 0 0 0 1
1 1 1 0 1 1
 MOORE MODEL – EXAMPLE-2
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
(Non-overlapping)
4. Determine excitation table
 MOORE MODEL – EXAMPLE-2
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
(Non-overlapping)
5. Construct the transition table
Present Next Flip-Flop
State Input State inputs Output
Q1 Q0 X Q1 Q0 D1 D0 Z
0 0 0 0 0 0 0 0
0 0 1 0 1 0 1 0
0 1 0 1 0 1 0 0
0 1 1 0 1 0 1 0
1 0 0 0 0 0 0 0
1 0 1 1 1 1 1 0
1 1 0 0 0 0 0 1
1 1 1 0 1 0 1 1
NOTE: Number of flip flops required for the design is calculated based on number of
state. In this case number state is 4, so we need 2 flip flop for the design (2 2=4).
 MOORE MODEL – EXAMPLE-2
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
(Non-overlapping)
6. K-Map simplification procedures for driving expressions
Q0X Q0X
00 01 11 10 00 01 11 10
Q1 Q1
0 0 0 0 1 0 0 1 1 0
1 0 1 0 0 1 0 1 1 0
D1 = Q1’Q0X’+Q1Q0’X
D0 = X
Q0X
NOTE: In Moore model, 00 01 11 10
Q1
0 0 0 0 0
the output expression (Z)
depends only on present
state values (Q1 & Q0) Z = Q1Q0
not on the input (X). 1 0 0 1 1
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “101”
(Non-overlapping)
7. Draw the logic diagram
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
1. Draw the state diagram
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
2. Construct state table
Present State Input Next State Output
A 0 A 0
A 1 B 0
B 0 C 0
B 1 B 0
C 0 D 0
C 1 B 0
D 0 A 0
D 1 E 0
E 0 C 1
E 1 B 1
NOTE: In the given state table, the output will be 1 whenever its present
state is “E” irrespective of input X (0 or 1).
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
3. Construct state table with state values
Present State Input Next State Output
Q2 Q1 Q0 X Q2 Q1 Q0 Z
0 0 0 0 0 0 0 0
0 0 0 1 0 0 1 0
0 0 1 0 0 1 0 0
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 0
0 1 0 1 0 0 1 0
0 1 1 0 0 0 0 0
0 1 1 1 1 0 0 0
1 0 0 0 0 1 0 1
1 0 0 1 0 0 1 1
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
4. Determine excitation table
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
5. Construct the transition table
Present State Input Next State Flip-Flop Inputs Output
Q2 Q1 Q0 X Q2 Q1 Q0 J2 K2 J1 K1 J0 K0 Z
0 0 0 0 0 0 0 0 X 0 X 0 X 0
0 0 0 1 0 0 1 0 X 0 X 1 X 0
0 0 1 0 0 1 0 0 X 1 X X 1 0
0 0 1 1 0 0 1 0 X 0 X X 0 0
0 1 0 0 0 1 1 0 X X 0 1 X 0
0 1 0 1 0 0 1 0 X X 1 1 X 0
0 1 1 0 0 0 0 0 X X 1 X 1 0
0 1 1 1 1 0 0 1 X X 1 X 1 0
1 0 0 0 0 1 0 X 1 1 X O X 1
1 0 0 1 0 0 1 X 1 0 X 1 X 1
NOTE: Number of flip flops required for the design is calculated based on number of
state. In this case number state is 5, so we need 3 flip flop for the design (2 3=8).
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
6. K-Map simplification procedures for driving expressions
Q0X Q0X
Q2Q1 00 01 11 10 Q2Q1 00 01 11 10
0 0 0 0 X X X X
00 00
0 0 1 0 X X X X
01 01
X X X X X X X X
11 11
X X X X 1 1 X X
10 10
J2 = Q1Q0X K2 = 1
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
6. K-Map simplification procedures for driving expressions
Q0X Q0X
Q2Q1 00 01 11 10 Q2Q1 00 01 11 10
0 0 0 1 X X X X
00 00
X X X X 0 1 1 1
01 01
X X X X X X X X
11 11
1 0 X X X X X X
10 10
J1 = Q2X’+Q0X’ K1 = X+Q0
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
6. K-Map simplification procedures for driving expressions
Q0X Q0X
Q2Q1 00 01 11 10 Q2Q1 00 01 11 10
0 1 X X X X 0 1
00 00
1 1 X X X X 1 1
01 01
X X X X X X X X
11 11
0 1 X X X X X X
10 10
J0 = X+Q1 K0 = X’+Q1
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
6. K-Map simplification procedures for driving expressions

Q0X
Q2Q1 00 01 11 10
0 0 0 0
00
0 0 0 0
01
X X X X
11
1 1 X X
NOTE: In Moore model,10
the output expression (Z)
depends only on present Z = Q2
state values (Q2) not on
the input (X).
 MOORE MODEL – EXAMPLE-3
STEPS TO DESIGN MOORE MODEL – SEQUENCE DETECTOR “1001”
7. Draw the logic diagram
Z

Q2 Q2’ Q1 Q1’ Q0 Q0’

J2 clk K2 J1 clk K1 J0 clk K0

HIGH
clk

X’
X
 MOORE MODEL – EXERCISE

Design an Moore based sequence detector to

detect the bit pattern of “1001” in non-
overlapping condition.
 Verilog code for Sequence Detector using Moore FSM
The sequence being detected is "1011" or One Zero One One
 Verilog code for Sequence Detector using Moore FSM
The sequence being detected is "1011" or One Zero One One
Verilog Test bench for the Moore FSM Sequence Detector: