LECTURE: FOUR

Physical and Data link layer

Senait G. (MSc.)
16/03/2023
Lecture outline
 Data link layer overview
 Flow and error control
 Flow control
 Error detection
 Error correction
 Physical layer
 Multiplexing and switching
 Data-link layer
 Data-link layer is responsible for implementation of point-to-
point flow and error control mechanism.
Flow Control
 When a data frame (Layer-2 data) is sent from one host to another over
a single medium, it is required that the sender and receiver should
work at the same speed.
 That is, sender sends at a speed on which the receiver can process
and accept the data.
 What if the speed (hardware/software) of the sender or receiver
differs?
 If sender is sending too fast the receiver may be overloaded,
(swamped) and data may be lost.
 Two types of mechanisms can be deployed to control the flow:
 Stop and Wait
 This flow control mechanism forces the sender after transmitting a data frame
to stop and wait until the acknowledgement of the data-frame sent is received.

 Sliding Window
 In this flow control mechanism, both sender and receiver agree on the number of
data-frames after which the acknowledgement should be sent.
 As we learnt, stop and wait flow control mechanism wastes resources, this
protocol tries to make use of underlying resources as much as possible.
Data Transmission Error Detection and Correction

 When data is transmitted from one device to another device, the

system does not guarantee whether the data received by the
device is identical to the data transmitted by another device.
 Whenever bits flow from one point to another, they are subject to unpredictable
changes because of interference.
 This interference can change the shape of the signal.
 An Error is a situation when the message received at the receiver end
is not identical to the message transmitted.
 Errors can be classified into two categories:
 Single-Bit Error
 Burst Error
 Single-Bit Error:
 The only one bit of a given data unit is changed from 1 to 0 or from 0 to 1.
 For example, the message which is sent is corrupted as single-bit, i.e., 0 bit is changed
to 1.

 Single-Bit Error does not appear more likely in Serial Data Transmission.

 For example, Sender sends the data at 10 Mbps, this means that the bit lasts only
for 1 s and for a single-bit error to occurred, a noise must be more than 1 s.
 Single-Bit Error mainly occurs in Parallel Data Transmission.
 For example, if eight wires are used to send the eight bits of a byte, if one of the
wire is noisy, then single-bit is corrupted per byte.
 Burst Error:
 The two or more bits are changed from 0 to 1 or from 1 to 0 is known as Burst
Error.
 The Burst Error is determined from the first corrupted bit to the last corrupted
bit.

 The duration of noise in Burst Error is more than the duration of noise in Single-
Bit.
 Burst Errors are most likely to occur in Serial Data Transmission.
 The number of affected bits depends on the duration of the noise and data rate.
Error Detection
 The detection of errors caused by noise or other impairments
during transmission from the transmitter to the receiver. 
 The receiver should detect the error before accepting the entire message.
 Error detection means to decide whether the received data is
correct or not without having the original message.
 To detect the error the sender should send some extra bits with the
original data called redundant bits

Error Detecting Techniques:

The most popular Error Detecting Techniques are:
 Single parity check
 Two-dimensional parity check
 Checksum
 Cyclic redundancy check
Single Parity Check
 Single Parity checking is the simple mechanism and inexpensive to detect
the errors.
 In this technique, a redundant bit is also known as a parity bit which is
appended at the end of the data unit so that the number of 1s becomes
even.
 Therefore, the total number of transmitted bits would be 9 bits.
 If the number of 1s bits is odd, then parity bit 1 is appended and if the
number of 1s bits is even, then parity bit 0 is appended at the end of
the data unit.
 At the receiving end, the parity bit is calculated from the received data
bits and compared with the received parity bit.
 Check whether the occurrence of 1’s from data unit is even or not.
 This technique generates the total number of 1s even, so it is known as
even-parity checking.
 Drawbacks Of Single Parity Checking
 It can only detect single-bit errors which are very rare.
 If two bits are interchanged, then it cannot detect the errors.
Two-Dimensional Parity Check
 Performance can be improved by using Two-Dimensional Parity
Check which organizes the data in the form of a table.
 Parity check bits are computed for each row, which is equivalent to
the single-parity check.
 In Two-Dimensional Parity check, a block of bits is divided into
rows, and the redundant row of bits is added to the whole block.
 At the receiving end, the parity bits are compared with the parity
bits computed from the received data.
 Check whether the occurrence of 1’s from each block of data unit is
even or not from both dimension.
Drawbacks Of 2D Parity Check
 If two bits in one data unit are corrupted and two bits exactly
the same position in another data unit are also corrupted, then
2D Parity checker will not be able to detect the error.
Checksum
 A Checksum is an error detection technique based on the concept of
redundancy.
 It is divided into two parts:
 Checksum Generator
 A Checksum is generated at the sending side.
 Checksum generator subdivides the data into equal segments of n bits each, and
all these segments are added together by using one's complement
arithmetic.
 The sum is complemented and appended to the original data, known as
checksum field.
 The extended data is transmitted across the network.
 Checksum Checker
 A Checksum is verified at the receiving side.
 The receiver subdivides the incoming data into equal segments of n
bits each, and all these segments are added together, and then this
sum is complemented.
 If the complement of the sum is zero, then the data is accepted
otherwise data is rejected.
 Cyclic Redundancy Check (CRC)
 CRC is a redundancy error technique used to determine the error.
 Following are the steps used in CRC for error detection:
 In CRC technique, a string of n 0s is appended to the data unit, and
this n number is less than the number of bits in a predetermined
number, known as divisor.
 The appended zeros are n-1 of the divisors
 Note: the divisor is generated by the system in which both sender and
receiver agreed up on.
 Mostly given as polynomial function (1x7+1x6+1x5+1x4+1x3+1x2+1x1+1x0)
 Secondly, the newly extended data is divided by a divisor using a
process is known as binary division with XOR operation replacing the
subtraction.
 The remainder generated from this division is known as CRC remainder.
 Thirdly, the CRC remainder replaces the appended 0s at the end of the
original data.
 This newly generated unit is sent to the receiver.
 The receiver receives the data followed by the CRC
remainder.
 The receiver will treat this whole unit as a single unit, and it is
divided by the same divisor that was used to find the CRC
remainder.
 If the resultant of this division is zero which means that it has no
error, and the data is accepted.
 If the resultant of this division is not zero which means that the
data consists of an error.
 Therefore, the data is discarded.
 Suppose the original data is 11100 and divisor is 1001.
 CRC Generator
 Firstly, three zeroes are appended at the end of the data as the length of the
divisor is 4 and we know that the length of the string 0s to be appended is
always one less than the length of the divisor.
 Now, the string becomes 11100000, and the resultant string is divided by the
divisor 1001(XOR replaces subtraction).
 The remainder generated from the binary division is known as CRC
remainder.
 The generated value of the CRC remainder is 111.
 CRC remainder replaces the appended string of 0s at the end of the data
unit, and the final string would be 11100111 which is sent across the network.
CRC Checker
 The functionality of the CRC checker is similar to the CRC generator.
 When the string 11100111 is received at the receiving end, then CRC
checker performs the binary division (XOR replaces subtraction).
 A string is divided by the same divisor, i.e., 1001.
 In this case, CRC checker generates the remainder of zero.
 Therefore, the data is accepted.
 Exercise
1. Check the given data using two dimensional check and answer
whether the receiver accept the data or not.
 The data which is delivered to destination are 10111 110101 110000
101110
2. Generate the checksum and detect the error for the message
110111011111110000101010
3. Generate the CRC code at the sender side and detect the error at the
receiver side for the message 1000100 using the CRC generator
x3+X2+1
Error Correction
 Error Correction codes are used to detect and correct the errors when
data is transmitted from the sender to the receiver.
 Error Correction can be handled in two ways:
 Backward error correction: Once the error is discovered, the receiver
requests the sender to retransmit the entire data unit.
 Forward error correction: In this case, the receiver uses the error-correcting
code which automatically corrects the errors.
 A single additional bit can detect the error, but cannot correct it.
 For correcting the errors, one has to know the exact position of the
error.
 For example, If we want to calculate a single-bit error, the error correction
code will determine which one of bits is in error.
 To achieve this, we have to add some additional redundant bits.
 Suppose r
is the number of redundant bits and d is the
total number of the data bits.
 The number of redundant bits r can be calculated by using the formula:

2 >=d+r+1
r

 The value of r is calculated by using the above formula.

 For example, if the value of d is 4, then the possible
smallest value that satisfies the above relation would be 3.
 To determine the position of the bit which is in error, a
technique developed by R.W Hamming called
 Hamming code which can be applied to any length of the
data unit and uses the relationship between data units
and redundant units.
Hamming Code
 Parity bits: The bit which is appended to the original data of binary bits so that the
total number of 1s is even or odd.
 Even parity: To check for even parity, if the total number of 1s is even, then the value of the
parity bit is 0.
 If the total number of 1s occurrences is odd, then the value of the parity bit is 1.
 Odd Parity: To check for odd parity, if the total number of 1s is even, then the value of
parity bit is 1.
 If the total number of 1s is odd, then the value of parity bit is 0.
 Algorithm of Hamming code:
 An information of 'd' bits are added to the redundant bits 'r' to form d+r.
 The location of each of the (d+r) digits is assigned a decimal value.
 The 'r' bits are placed in the two power positions (1,2,4,.....2r-1).
 Determining the value of the redundant bit (either 0 or 1) using even or odd parity
 Performing a parity check on the bit positions whose binary representation includes 1 in the
first position for 1st parity bit, 1 in the second position for 2nd parity bit and 1 in the third
position for 3rd parity bit etc.
 At the receiving end, the parity bits are recalculated.
 If we get the parity check bits all 0, it means there is no error then accepted
 Otherwise rejected and the decimal value of the parity check bits determines the
position of an error.
 By arranging the parity check bits from most significant bit to list significant bit
 Relationship b/w Error position & binary number.

 Let's understand the concept of Hamming code through an example:

 Suppose the original data is 1010 which is to be sent.
 Total number of data bits 'd' = 4
 Number of redundant bits r : 2r >= d+r+1
2r>= 4+r+1
 Therefore, the value of r is 3 that satisfies the above relation.
 Total number of bits = d+r = 4+3 = 7;
Determining the position of the redundant bits
 The number of redundant bits is 3.
 The three bits are represented by r1, r2, r4.
 The position of the redundant bits is calculated with corresponds to
the raised power of 2.
 Therefore, their corresponding positions are 1, 21, 22.
 The position of r1 = 1  
 The position of r2 = 2  
 The position of r4 = 4  
 Representation of Data on the addition of parity bits:
Determining the Parity bits
 Determining the r1 bit
 The r1 bit is calculated by performing a parity check on the bit
positions whose binary representation includes 1 in the first position.

 We observe from the above figure that the bit positions that includes 1
in the first position are 1, 3, 5, 7.
 Now, we perform the even-parity check at these bit positions.
 The total number of 1 at these bit positions corresponding to r1
is even, therefore, the value of the r1 bit is 0.
Determining r2 bit
 The r2 bit is calculated by performing a parity check on the bit
positions whose binary representation includes 1 in the second
position.

 We observe from the above figure that the bit positions that includes
1 in the second position are 2, 3, 6, 7.
 we perform the even-parity check at these bit positions.
 The total number of 1 at these bit positions corresponding to r2
is odd, therefore, the value of the r2 bit is 1.
Determining r4 bit
 The r4 bit is calculated by performing a parity check on the bit positions
whose binary representation includes 1 in the third position.

 We observe from the above figure that the bit positions that includes 1
in the third position are 4, 5, 6, 7.
 Now, we perform the even-parity check at these bit positions.
 The total number of 1 at these bit positions corresponding to r4 is even,
therefore, the value of the r4 bit is 0.
 Data transferred is given below:
 Suppose the 4th bit is changed from 0 to 1 at the receiving
end, then parity bits are recalculated.
 R1 bit
 The bit positions of the r1 bit are 1,3,5,7

 We observe from the above figure that the binary

representation of r1 is 1100.
 Now, we perform the even-parity check, the total number of
1s appearing in the r1 bit is an even number.
 Therefore, the value of r1 is 0.
 R2 bit
 The bit positions of r2 bit are 2,3,6,7.

 We observe from the above figure that the binary

representation of r2 is 1001.
 Now, we perform the even-parity check, the total number
of 1s appearing in the r2 bit is an even number.
 Therefore, the value of r2 is 0.
 R4 bit
 The bit positions of r4 bit are 4,5,6,7.

 We observe from the above figure that the binary representation of r4 is

1011.
 Now, we perform the even-parity check, the total number of 1s appearing
in the r4 bit is an odd number.
 Therefore, the value of r4 is 1.
 The binary representation of redundant bits, i.e., r4r2r1 is 100, and its
corresponding decimal value is 4.
 Therefore, the error occurs in a 4th bit position.
 The bit value must be changed from 1 to 0 to correct the error.
Exercise
1. Generate hamming code for the message 1000 using
even parity
2. Check and correct error using hamming code for the
transmitted data unit 1010111 using even parity
3. Check and correct error using hamming code for the
transmitted data unit 110011011110 using odd parity
4. How about correcting more than single bit error?
repttion code
5. better repttuion code
6. hamming distance
Physical layer

 Physical layer in the OSI model plays the role of interacting

with actual hardware and signaling mechanism.
 Physical layer is the only layer of OSI network model which
actually deals with the physical connectivity of two different
stations.
 This layer defines the hardware equipment, cabling, wiring,
frequencies, pulses used to represent binary signals etc.
 Physical layer provides its services to Data-link layer.
 Data-link layer hands over frames to physical layer.
 Physical layer converts them to electrical pulses, which
represent binary data.
 The binary data is then sent over the wired or wireless
media.
Multiplexing
• Multiplexing is a technique used to combine and send the multiple data
streams over a single medium.
• The process of combining the data streams is known as multiplexing and
hardware used for multiplexing is known as a multiplexer.
• Multiplexing is achieved by using a device called Multiplexer (MUX) that
combines n input lines to generate a single output line.
• Multiplexing follows many-to-one, i.e., n input lines and one output line.
• Demultiplexing is achieved by using a device called Demultiplexer
(DEMUX) available at the receiving end.
• DEMUX separates a signal into its component signals (one input and n
outputs).
• Therefore, we can say that demultiplexing follows the one-to-many
approach.
Why Multiplexing?
 The transmission medium is used to send the signal from sender to
receiver.
 The medium can only have one signal at a time.
 If there are multiple signals to share one medium, then the medium
must be divided in such a way that each signal is given some
portion of the available bandwidth.
 For example: If there are 10 signals and bandwidth of medium is100
units, then the 10 unit is shared by each signal.
 When multiple signals share the common medium, there is a
possibility of collision.
 Multiplexing concept is used to avoid such collision.
• Multiplexing technique is widely used in telecommunications in
which several telephone calls are carried through a single wire.
Switching techniques

 In large networks, there can be multiple paths from

sender to receiver.
 The switching technique will decide the best route for data
transmission.
 Switching technique is used to connect the systems for
making one-to-one communication.
 Switching techniques is used to establish communication links
between data, source and receiver in a communication network.
Circuit Switching
 Circuit switching is a switching technique that establishes a
dedicated path between sender and receiver.
 In the Circuit Switching Technique, once the connection is
established then the dedicated path will remain to exist until the
connection is terminated.
 A complete end-to-end path must exist before the communication
takes place.
 In case of circuit switching technique, when any user wants to send
the data, voice, video, a request signal is sent to the receiver then
the receiver sends back the acknowledgment to ensure the
availability of the dedicated path.
 After receiving the acknowledgment, dedicated path transfers the data.
 Circuit switching is used in public telephone network.
 It is used for voice transmission.
 Fixed data can be transferred at a time in circuit switching
technology.
 Communication through circuit switching has 3
phases:
 Circuit establishment
 Data transfer
 Circuit Disconnect
Message Switching
 Message Switching is a switching technique in which a message is
transferred as a complete unit and routed through intermediate
nodes at which it is stored and forwarded.
 In Message Switching technique, there is no establishment of a
dedicated path between the sender and receiver.
 The destination address is appended to the message.
 Message Switching provides a dynamic routing as the message is routed
through the intermediate nodes based on the information available in the
message.
 Message switches are programmed in such a way so that they can
provide the most efficient routes.
 Each and every node stores the entire message and then forward it
to the next node.
 This type of network is known as store and forward network.
 Message switching treats each message as an independent entity.
Packet Switching
 The packet switching is a switching technique in which the
message is sent in one go, but it is divided into smaller pieces, and
they are sent individually.
 The message splits into smaller pieces known as packets and
packets are given a unique number to identify their order at the
receiving end.
 Every packet contains some information in its headers such as
source address, destination address and sequence number.
 Packets will travel across the network, taking the shortest path as
possible.
 All the packets are reassembled at the receiving end in correct
order.
 If any packet is missing or corrupted, then the message will be
sent to resend the message.
 If the correct order of the packets is reached, then the
acknowledgment message will be sent.
There are two approaches to Packet Switching:
 Datagram Packet switching
 Datagram Packet Switching is also known as connectionless
switching.
 It is a packet switching technology in which packet is known as a
datagram, is considered as an independent entity.
 In Datagram Packet Switching technique, the path is not fixed.
 Intermediate nodes take the routing decisions to forward the
packets.
 Virtual Circuit Switching
 Virtual Circuit Switching is also known as connection-oriented
switching.
 In the case of Virtual circuit switching, a preplanned route is
established before the messages are sent.
 Call request and call accept packets are used to establish the
connection between sender and receiver.
 In this case, the path is fixed for the duration of a logical connection.
• Many thanks!
• Questions?