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Introduction To Network Processors

Network processors are single-chip devices that contain multiple programmable processor cores and specialized hardware for processing network packets at high speeds. They provide flexibility to handle various network protocols and scales well for high-performance switches and routers. While early network processors faced some risks, their ability to more quickly implement new network functions compared to custom ASICs means they are becoming an important technology for flexible packet processing.

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Ahmed Hamouda
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123 views

Introduction To Network Processors

Network processors are single-chip devices that contain multiple programmable processor cores and specialized hardware for processing network packets at high speeds. They provide flexibility to handle various network protocols and scales well for high-performance switches and routers. While early network processors faced some risks, their ability to more quickly implement new network functions compared to custom ASICs means they are becoming an important technology for flexible packet processing.

Uploaded by

Ahmed Hamouda
Copyright
© © All Rights Reserved
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Introduction to Network Processors

Readout Unit Review


24 July 2001

Beat Jost
Cern / EP
Little Bit of History
 September 1999 C-Port (Motorola) announced the first
Network Processor (actual production only in 2001!). The aim
was to provide a flexible means to handle frames/packets in a
distributed manner at the input of high-performance switches
and routers.
 During 2000 several big companies also started developing NPs
(Intel, IBM, Lucent,…) driven by networking industry
 Today there are some 20 companies either offering NPs already
or announced the development of NPs
 Nowadays the market is dominated by small companies, but the
biggies are catching up…
 There are some 200 projects (“design wins”) currently
underway. IBM is applied by Alcatel, CISCO, NORTEL,…

Beat Jost, Cern 2


Network Processors – What are they?
Single Chips containing
On-chip buffer space for
network frames and routing
table plus controllers for
external buffer space
Integrated General
Purpose processor for
control and monitoring and
communication with General Packet Buffer
Scheduler
outside world Purpose Memory
CPU

Routing and Processor


Bridging Tables Complex
Integrated MACs (Media
Access Controllers) for
Large numbers (8-16) of Search different technologies
RISC processor cores Engine MAC/FRAME
(POS, Ethernet)
(freely programmable) HW Processor
Assist
usually with
 Several hardware threads
To and From PHYs

 Several Co-Processors for specialized functions, like CRC


calculations, tree-lookup, memory copying, traffic shaping, etc.

Beat Jost, Cern 3


Network Processors – What are they used for?

Primarily as front-end stage of high-speed network


switches/routers
Next Generation
Conventional Switch (distributed) Switch

POS (packet Over SONET)/GbEthernet


Doesn’t scale very well!!!! Scales very well
Beat Jost, Cern 4
Network Processors – What’s their advantage?

The programmability of NPs


 Gives flexibility to cope with new requirements and network
protocols
 Allows switch manufacturers to implement e.g. custom
quality of service or flow-controls algorithms
 Keep Time-to-market much smaller than designing and
manufacturing custom ASICs (~6 months compared to 18
months)

Beat Jost, Cern 5


Summary and Prospects
Summary
 NPs are a very interesting new technology for flexible network
frame handling
 Every major chip manufacturer has them in their product catalog
 They can be used for data merging and other applications
Outlook
 Next generation of NPs will be able to deal with 10Gb and 40Gb
link speeds with corresponding upgrade in processing capabilities
lower prices for current devices
Risks
 Economical failure
 Short life or discontinuity of a certain implementation (IBM
claims NP4GS3 will be produced for 4-5 years)
 Cost
“The time-to-market benefits of NPUs are too great to ignore. Despite early
disappointments, network processors are here to stay.”
Bob Wheeler Senior Analyst Networking Silicon, The Linley Group Inc

Beat Jost, Cern 6


General Scheduler Packet Buffer
Purpose Memory
CPU

Routing and Processor


Bridging Tables Complex

Search
Engine MAC/FRAME
HW
Assist
Processor

To and From PHYs

Beat Jost, Cern 7

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