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    Chapter 7 Flipflops

    Uploaded by

    MUHAMMAD DANIEL AIMAN BIN MD AMAN
    This document discusses sequential circuits and different types of latches and flip-flops. It defines sequential circuits as circuits whose outputs depend not only on present inputs but also past inputs. It describes set-reset latches, D latches, SR flip-flops, D flip-flops, and JK flip-flops. For each type, it provides block diagrams, truth tables, and examples of timing diagrams showing how their output waveforms change in response to input signals. The goal is for students to understand the differences between latches, flip-flops, and their usage in sequential circuits.

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    Chapter 7 Flipflops

    Uploaded by

    MUHAMMAD DANIEL AIMAN BIN MD AMAN
    29 views13 pages
    This document discusses sequential circuits and different types of latches and flip-flops. It defines sequential circuits as circuits whose outputs depend not only on present inputs but also past inputs. It describes set-reset latches, D latches, SR flip-flops, D flip-flops, and JK flip-flops. For each type, it provides block diagrams, truth tables, and examples of timing diagrams showing how their output waveforms change in response to input signals. The goal is for students to understand the differences between latches, flip-flops, and their usage in sequential circuits.

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    This document discusses sequential circuits and different types of latches and flip-flops. It defines sequential circuits as circuits whose outputs depend not only on present inputs but also past inputs. It describes set-reset latches, D latches, SR flip-flops, D flip-flops, and JK flip-flops. For each type, it provides block diagrams, truth tables, and examples of timing diagrams showing how their output waveforms change in response to input signals. The goal is for students to understand the differences between latches, flip-flops, and their usage in sequential circuits.

    Copyright:

    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    29 views13 pages

    Chapter 7 Flipflops

    Uploaded by

    MUHAMMAD DANIEL AIMAN BIN MD AMAN
    This document discusses sequential circuits and different types of latches and flip-flops. It defines sequential circuits as circuits whose outputs depend not only on present inputs but also past inputs. It describes set-reset latches, D latches, SR flip-flops, D flip-flops, and JK flip-flops. For each type, it provides block diagrams, truth tables, and examples of timing diagrams showing how their output waveforms change in response to input signals. The goal is for students to understand the differences between latches, flip-flops, and their usage in sequential circuits.

    Copyright:

    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    of 13

    Sequential Circuit

    Set-Reset Latch and Flip-Flop


    Data Latch and Flip-Flop
    JK Flip-Flop
    • At the end of this chapter, students should be able
    to:-
    – Differentiate between combinational and sequential
    circuit.
    – Distinguish between latch and flip-flop.
    – Describe the operation of Set-Reset Latch/Flip-flop, Data
    Latch/Flip-flop and JK Flip-Flop.
    – Draw the timing diagram for each flip-flop.
    – Explain the usage of D flip-flop in a simple calculator
    application.

    10/9/2012 RA/Sept2013-Jan2014 2
    • Two categories of logic circuits:
    Combinational Logic Circuit

    Sequential Logic Circuit

    • Combinational logic circuit is a type of digital logic


    which is implemented by Boolean circuits, where the
    output is a pure function of the present input only.

    Input Combinational Ouput


    Logic Gates

    10/9/2012 RA/Sept2012-Jan2013 3
    • In sequential logic circuit, the output depends not
    only on the present input but also on the history of
    the input.
    Input Combinational Ouput
    Logic Gates

    Memory

    • In other words, sequential logic has memory while


    combinational logic does not.

    10/9/2012 RA/Sept2012-Jan2013 4
    • Two memory elements that have been used as data storage are
    latch and flip-flops.
    • Two types of latch are:
    SR Latch D Latch

    • Three types of flip-flops are:

    SR Flip-flop D Flip-flop

    10/9/2012 RA/Sept2012-Jan2013 5
    Block Diagram Truth table Input Output
    S R Q Mode
    S Q
    SR Hold
    Latch 0 0 Q
    R Q
    0 1 0 Reset

    • Based on the following figure, draw 1 0 1 Set

    the Q waveform for the SR latch. 1 1 - Invalid


    Assume that Q starts LOW.
    TimingDiagram

    Reset Reset

    10/9/2012 RA/Sept2012-Jan2013 6
    Block Diagram Truth table Input Output
    CLOCK S R Q Mode
    S SET
    Q Hold
    0 0 Q
    0 1 0 Reset
    R CLR Q
    1 0 1 Set

    Based on the following figure, draw 1 1 - Invalid


    the Q waveform for the SR flip-flop.
    Assume that Q starts LOW.
    CLK 1 2 3 4 5 6 7 8

    TimingDiagram S

    Hold Set Hold Reset Set Set Hold Reset

    Output Q changes states


    10/9/2012 (reacts) when the CLK
    RA/Sept2012-Jan2013 7
    changes from 0 to 1
    Block Diagram Truth table Input Output
    E D Q Mode
    0 0 Q Hold
    D Q
    0 1 Q Hold

    E Q 1 0 0 Copy the value of D

    1 1 1 Copy the value of D

    Based on the following figure, draw the Q waveform for the D latch.
    Assume that Q starts LOW. 1 2 3 4
    TimingDiagram E

    Output Q changes states


    immediately when D
    10/9/2012 RA/Sept2012-Jan2013 changes 8
    Block Diagram Truth table

    Input Output
    D SET
    Q
    CLOCK D Q Mode
    0 0 Hold
    CLR Q
    1 1 Reset

    Based on the following figure, draw the Q waveform for the D flip-
    flop. Assume that Q starts LOW.
    CLK 1 2 3 4
    TimingDiagram
    D

    10/9/2012 RA/Sept2012-Jan2013 9
    10/9/2012 RA/Sept2012-Jan2013 10
    10/9/2012 RA/Sept2012-Jan2013 11
    Block Diagram Truth table Input Output
    CLOCK J K Q Mode
    J SET Q Hold
    0 0 Q
    0 1 0 Reset
    K CLR Q
    1 0 1 Set

    1 1 Q Toggle

    Based on the following figure, draw the Q waveform for the JK


    flip-flop. Assume that Q starts LOW.
    TimingDiagram
    CLK 1 2 3 4 5 6 7 8

    K
    Q
    Hold Set Hold Reset Toggle Toggle Hold Toggle
    10/9/2012 RA/Sept2012-Jan2013 12
    10/9/2012 RA/Sept2012-Jan2013 13

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