Decoders and - Encoders

DIGITAL SYSTEMS TCE1111
DECODER
•A decoder is a logic circuit that accepts a set of inputs that
represents a binary number and activates only the output that
corresponds to the input number.
•In other words, a decoder circuit looks at its inputs,
determines which binary number is present there, and activates
the one output that corresponds to that number ; all other
outputs remain inactive
1
In its general form, a decoder has N input lines to handle N

bits and form one to 2 N output lines to indicate the presence of
one or more N-bit combinations.
The basic binary function

•An AND gate can be used as the basic decoding element
because it produces a HIGH output only when all inputs are
HIGH
Refer next slide for example 2

Decoding logic for the binary code 1001 with an active-HIGH output.
3
General decoder diagram
# There are 2N possible input combinations, from A0 to AN1.
For each of these input combinations only one of the M outputs

will be active HIGH (1), all the other outputs are LOW (0). 4
2-to-4-Line Decoder
(with Enable input)-Active LOW output (2)
• The circuit operates with complemented outputs and a

complement enable input. The decoder is enabled when E is equal
to 0.
• Only one output can be equal to 0 at any given time, all other
outputs are equal to 1.
• The output whose value is equal to 0 represents the minterm
selected by inputs A and B
• The circuit is disabled when E is equal to 1.
5
3-8 line decoder (active-HIGH)
6
•This decoder can be referred to in several ways. It can be

called a 3-line-to- 8-line decoder, because it has three input
lines and eight output lines.
•It could also be called a binary-octal decoder or converters
because it takes a three bit binary input code and activates the
one of the eight outputs corresponding to that code. It is also
referred to as a 1-of-8 decoder, because only 1 of the 8
outputs is activated at one time.
7
74138 (Example of a 3 8 Bit Decoder)
• There is an enable function on this device, a LOW level on each input

E’1, and E’2, and a HIGH level on input E3, is required in order to
make the enable gate output HIGH.
• The enable is connected to an input of each NAND gate in the

decoder, so it must be HIGH for the NAND gate to be enabled.
• If the enable gate is not activated then all eight decoder outputs will
be HIGH regardless of the states of the three input variables A0, A1,
and A2 .
8
Logic symbol for a 4-line-to-16-line (1-of-16) decoder .

74HC154
9
4-line-to-16 line Decoder constructed with two 3-line-

to-8 line decoders (1)...
10
4-line-to-16 line Decoder constructed with two 3-line-

to-8 line decoders (2)
• When w=0, the top decoder is enabled and the other is disabled.
The bottom decoder outputs are all 0’s , and the top eight outputs
generate min-terms 0000 to 0111.
• When w=1, the enable conditions are reversed. The bottom
decoder outputs generate min-terms 1000 to 1111, while the
outputs of the top decoder are all 0’s.
11
Application example
A simplified computer I/O port system with a port address decoder with only four address
lines shown.
12
•Decoders are used in many types of applications. One example is in

computers for I/O selection as in previous slide
•Computer must communicate with a variety of external devices called

peripherals by sending and/or receiving data through what is known as
input/output (I/O) ports
•Each I/O port has a number, called an address, which uniquely

identifies it. When the computer wants to communicate with a particular
device, it issues the appropriate address code for the I/O port to which
that particular device is connected . The binary port address is decoded
and appropriate decoder output is activated to enable the I/O port
•Binary data are transferred within the computer on a data bus, which is
13
a set of parallel lines
BCD -to- Decimal decoders
•The BCD- to-decimal decoder converts each BCD code into

one of Ten Positionable decimal digit indications. It is
frequently referred as a 4-line -to- 10 line decoder
•The method of implementation is that only ten decoding gates
are required because the BCD code represents only the ten
decimal digits 0 through 9.
•Each of these decoding functions is implemented with NAND
gates to provide active -LOW outputs. If an active HIGH
output is required, AND gates are used for decoding
14
Logic diagram of BCD - decimal decoder
(Active LOW output)
15
Output Waveform for BCD Decoder 16

A Decoder Application - Counter -decoder combination used to

provide timing and sequential operations (1)...
17
A Decoder Application - Counter -decoder combination used to provide

timing and sequential operations (1)...
•Decoders are used whenever an output or a group of

outputs is to be activated only on the occurrence of specific
combination of input levels. These input levels are often
provided by the outputs of a counter or register.
•When the decoder inputs come from a counter that is
being continually pulsed, the decoder outputs will be
activated sequentially, and there can be used as timing or
sequencing signals to turn device on or off at specific times
18
BCD-7segment decoders/drivers
Most digital equipment has some means for

displaying information in a form that can
be understood by the user. This
information is often numerical data but
also be alphanumeric.
One of the simplest and most popular
methods for displaying numerical digits
uses a 7-segment configuration to form
digital characters 0 to 9 and some times the
hex characters A to F
19
One common arrangements uses light-emitting diodes (LED's)

for each segment. By controlling the current thru each LED,
some segments will be light and others will be dark so that
desired character pattern will be generated
Figure shows the
segment pattern that
are used to display
the various digits. For
example, to display a
“6” the segments
a,c,d,e,f and g are
made bright while
segment b is dark
20
7-segment decoder
•A BCD-7 segment decoder/driver is used to take four-bit

BCD input and provide the outputs that will pass current
through the appropriate segments to display the decimal digit.
•The logic for this decoder is more complicated than the logic
of decoders of earlier case, because each output is activated
for more than one combination of inputs.
21
74LS47 ( BCDtoSevenSegment Decoder)
22
23
Common Cathode
• In commoncathode, the cathode of all of the LEDs are tied together to

ground as shown.
GND
24
Combinational Logic Circuit Implementation using a

Decoder
• Any combinational logic circuit with n inputs and m outputs can

be implemented with an n-to-2n-line decoder and m OR gates.
• Procedure:
– Express the given Boolean function in sum of min-terms
– Choose a decoder to generate all the min-terms of the input
variables.
– Select the inputs to each OR gate from the decoder outputs
according to the list of min-term for each function.
25
Combinational Logic Circuit Implementation
using a Decoder - An example (1)
• From the truth table of the full adder,
x y Z C S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
• the functions can be expressed in sum of min-terms.

S(x,y,z) = m(1,2,4,7)
C(x,y,z) = m(3,5,6,7)
where  indicates sum, m indicates min-term and the number in brackets
indicate the decimal equivalent
26
Combinational Logic Circuit Implementation

using a Decoder - An example (2)
Since there are three inputs and a total of eight min-terms, we need a
3-to-8 line decoder.
• The decoder generates the eight min-terms for x,y,z
• The OR gate for output S forms the logical sum of min-terms
1,2,4, and 7.
• The OR gates for output C forms the logical sum of min-terms
3,5,6, and 7
27
Combinational Logic Circuit Implementation using a

Decoder - example (3)
Implementation of a Full Adder with a Decoder 28

Encoder
•An encoder is a combinational logic circuit that essentially

performs a “reverse” of decoder functions.
•An encoder accepts an active level on one of its inputs,
representing digit, such as a decimal or octal digits, and
converts it to a coded output such as BCD or binary.
•Encoders can also be devised to encode various symbols and
alphabetic characters.
•The process of converting from familiar symbols or numbers
to a coded format is called encoding.
29
•Most decoders accept an input code and produce a HIGH

•( or a LOW) at one and only one output line. In otherworlds ,
a decoder identifies, recognizes, or detects a particular code.
The opposite of this decoding process is called encoding and
is performed by a logic circuit called an encoder.
•An encoder has a number of input lines, only one of which
input is activated at a given time and produces an N-bit output
code,depending on which input is activated.
30
General encoder diagram
31
Logic circuit for octal-to binary encoder [8-
line- 3-line ]
32
Truth table for octal-to binary encoder [8-line- 3-line ]
A low at any single input will produce the output binary code corresponding to that
input. For instance , a low at A3’ will produce O2 =0, O1=1 and O0 =1, which is
binary code for 3. Ao’ is not connected to the logic gates because the encoder
outputs always be normally at 0000 when none of the inputs is LOW 33
Design of 4-input Priority Encoder

( 4-line-to 2 line priority encoder) (1)...
• A priority encoder is an encoder that includes the priority

function
• If two or more inputs are equal to 1 at the same time, the input
having the highest priority will take precedence.
• Truth Table of a 4-input Priority Encoder:
Inputs Outputs
D0 D1 D2 D3 x y V
0 0 0 0 X X 0
1 0 0 0 0 0 1
X 1 0 0 0 1 1
X X 1 0 1 0 1
X X X 1 1 1 1 34

• In addition to two outputs x, and y, the truth table has a third

output designated by V, which is a valid bit indicator that is set 1
when one or more inputs are equal to 1. If all inputs are 0, there is
no valid input and V is equal to 0.
• X’s in the output column indicate don’t care conditions, the X’s
in the input columns are useful for representing a truth table in
condensed form.
• The higher the subscript number, the higher the priority of the
input. Input D3 has the highest priority, so regardless of the
values of the other inputs, when this input is 1, the output for xy
is 11 (binary 3)
35

V=D0+D1+D2+D3
K-Maps for 4-input Priority Encoder 36
The 16 to4 Encoder
37

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DIGITAL SYSTEMS TCE1111

In its general form, a decoder has N input lines to handle N

The basic binary function

Refer next slide for example 2

# There are 2N possible input combinations, from A0 to AN1.

For each of these input combinations only one of the M outputs

• The circuit operates with complemented outputs and a

3-8 line decoder (active-HIGH)

•This decoder can be referred to in several ways. It can be

74138 (Example of a 3 8 Bit Decoder)

• There is an enable function on this device, a LOW level on each input

• The enable is connected to an input of each NAND gate in the

Logic symbol for a 4-line-to-16-line (1-of-16) decoder .

4-line-to-16 line Decoder constructed with two 3-line-

4-line-to-16 line Decoder constructed with two 3-line-

•Decoders are used in many types of applications. One example is in

•Computer must communicate with a variety of external devices called

•Each I/O port has a number, called an address, which uniquely

BCD -to- Decimal decoders

•The BCD- to-decimal decoder converts each BCD code into

Output Waveform for BCD Decoder 16

A Decoder Application - Counter -decoder combination used to

A Decoder Application - Counter -decoder combination used to provide

•Decoders are used whenever an output or a group of

Most digital equipment has some means for

One common arrangements uses light-emitting diodes (LED's)

•A BCD-7 segment decoder/driver is used to take four-bit

74LS47 ( BCDtoSevenSegment Decoder)

• In commoncathode, the cathode of all of the LEDs are tied together to

Combinational Logic Circuit Implementation using a

• Any combinational logic circuit with n inputs and m outputs can

• the functions can be expressed in sum of min-terms.

Combinational Logic Circuit Implementation

Combinational Logic Circuit Implementation using a

Implementation of a Full Adder with a Decoder 28

•An encoder is a combinational logic circuit that essentially

•Most decoders accept an input code and produce a HIGH

General encoder diagram

Truth table for octal-to binary encoder [8-line- 3-line ]

Design of 4-input Priority Encoder

• A priority encoder is an encoder that includes the priority

Design of 4-input Priority Encoder

• In addition to two outputs x, and y, the truth table has a third

Design of 4-input Priority Encoder

The 16 to4 Encoder

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