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2 - Module 2

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VES INSTITUTE OF TECHNOLOGY

DEPARTMENT OF INFORMATION TECHNOLOGY

Automata Theory (ITC404)

BY
Mrs Charusheela Nehete
Assistant Professor,
IT Department ,
VESIT

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Module 2 -Finite Automata
Finite Automata: FA as language acceptor or verifier, NFA ( with and without ε) , DFA, RE
to NFA, NFA to DFA, Reduced DFA , NFA-DFA equivalence, FA to RE. Finite State
Machines with output : Moore and Mealy machines. Moore and Mealy M/C conversion.
Limitations of FA.
Self-learning Topics: Practice exercise on FA and NFA

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Contents
• Basic Machine
• Finite State Machine
• Finite Automaton (FA)
• Deterministic Finite Automata (DFA)
• Formal Definition
• Transition Diagram
• Examples

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Basic Machine

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Basic Machine Examples(Cntd..)

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Finite State Machines FSM)
• Unlike basic machine, in FSM, we are concerned with machine
behavior, regarding in which internal state machine is and
how machine behaves upon receiving different intermediate
inputs in the current state.

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FSM: Examples

Example 1: Construct a FSM for Binary adder

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FSM: Examples

• Construct a FSM for Binary adder

I S Carry No Carry I S Carry No Carry

(0,0 1 (0,0) 1 Carry


No
0 0 No Carry
)
(0,1 (0,1)
0 1 Carry
0 1 No Carry
)
(1,0 (1,0)
0 1 0
Carry 1 No Carry
)
(1,1) 1
(1,1 1 0 Carry 0 Carry
)

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I S Carry No Carry I S Carry No Carry

(0,0 1 (0,0) 1 Carry


No
0 0 No Carry
)
(0,1 (0,1)
0 1 Carry
0 1 No Carry
)
(1,0 (1,0)
0 1 0
Carry 1 No Carry
)
(1,1) 1
(1,1 1 0 Carry 0 Carry
)

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Design/Construct a FSM Steps:

1. Set of Input Symbols (I)


2. Set of States (S)
3. MAF,STF
4. TG / TM
5. Simulation

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Example 2:

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Example 3:

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Example 3:

CS I/p Symbol NS O/P Symbol

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Simulation for input 101
Example 4:

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Finite Automaton (FA)
• FA is a mathematical model of FSM.

• Informally, a state diagram that comprehensively captures all


possible states and transitions that a machine can take while
responding to a stream or sequence of input symbols

• FA portrays the FSM as language acceptor.

• Recognizer for “Regular Languages”

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FA– Formal Definition
• FA is formally defined as a collection of 5 tuples:
• FA= (Q, ∑ , δ q0, F )
Where
– Q is a finite set of states
– ∑ is a finite set of input symbols (alphabet)
– q0 is a start state
– F is a finite set of accepting states
– δ is a transition function, which is a mapping Q x ∑ 🡪 Q

• No output Set O. Hence called as FA without Output.

• Upon reading entire input string if machine resides in any of the final states,
then i/p string is considered to be accepted by m/c otherwise rejected.

• Thus FA acts as an input acceptor or rejector.


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Transition Graph for Finite Automata

• Almost same as FSM.


• Only difference is thet in FA, we need to represent
final states and we do not have output symbol.

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Examples of Finite Automata as Acceptor

The required FA is M = (Q, ∑ , δ , q0, F )

∑ = { C,H,A,R.I,O,T}
Q={ q0, q1, q2, q3 }
q0 = Initial State of machine
q1 = State of the machine after reading a string ending in C
q2 = State of the machine after reading a string ending in CA
q3 = State of the machine after reading a string ending in CAT
F = { q3 }

δ : Q x ∑ --> Q

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Examples of Finite Automata as Acceptor

δ : Q x ∑ --> Q F = { q3 }

Simulation for input String “ACHCATRI”

CS I/p Symbol NS O/P Symbol

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Examples of Finite Automata as Acceptor

Design a FA that accepts all strings over ∑={0,1} which end with either
‘00’ or ‘11’

The required FA is M = (Q, ∑ , δ , q0, F )


∑ = {0,1}

Q={ q0, q1, q2, q3, q4 }


q0 = Initial State of machine
q1 = State of the machine after reading a string ending in 0
q2 = State of the machine after reading a string ending in 00
q3 = State of the machine after reading a string ending in 1
q4 = State of the machine after reading a string ending in 11
F = { q2, q4 }

δ : Q x ∑ --> Q

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Exercises

• Design a FA for divisibility by 4 tester for a binary number.


• Design a FA for divisibility by 3 tester for a ternary number.
• Design FA that accepts all strings over ∑={x,y} ending with xyy.
• Design FA that accepts all strings over ∑={x,y} beginning with xyy.
• Design FA that accepts all strings over ∑={x,y} having xyy as a
substring.
• Design FA that accepts all strings over ∑={x,y} not having xyy as a
substring.
• Design FA that accepts all strings over ∑={x,y} having xyy or xxy or
both as a substring.
• Design FA that accepts all strings over ∑={x,y} having neither xyy
nor xxy as a substring.

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Exercises

• Design a FA for divisibility by 4 tester for a binary number.

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Exercises

• Design a FA for divisibility by 3 tester for a ternary number.

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Exercises

• Design FA that accepts all strings over ∑={x,y} ending with xyy.

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Exercises

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Exercises
Design DFA for the following languages:

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FA as finite Control

• Input string is written on finite tape, one symbol per cell.


• $ indicate end of input string.
• Pointer or head points to cell on tape from which next input symbol can be read.
•Head is labeled by the state label that represents the current state of the machine
• FA reads symbols one by one from finite tape
• After reading symbol head always moves to right to read the next symbol.
•If it reads $, that means its end of input and at this stage, if the FA is in final state, string is
Accepted else Rejected.

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Types of FA
Finite Automata

FA without o/p FA with o/p

NFA DFA Moore m/c Mealy m/c

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FA without Output
• FA without o/p :
• Deterministic Finite Automata (DFA)
– A FA is said to be deterministic if for every state, there
is a unique input symbol that takes the state to
required next unique state.
– There can not be more than one transitions on same
input symbol from same state.
• Non-deterministic Finite Automata (NFA)
– A FA in which there exists at least one state from which
there are more than one transitions on same input
symbol.

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Formal Definition
• Deterministic Finite Automata (DFA)
DFA= (Q, ∑ , δ, q0, F ) Where
– Q is a finite set of states
– ∑ is a finite set of input symbols (alphabet)
– q0 is a start state
– F is a finite set of accepting states
– δ is a transition function, which is a mapping Q x ∑ 🡪 Q

• Non Deterministic Finite Automata (NFA)


NFA= (Q, ∑ , δ ,q0, F ) Where
– Q is a finite set of states
– ∑ is a finite set of input symbols (alphabet)
– q0 is a start state
– F is a finite set of accepting states
– δ is a transition function, which is a mapping Q x ∑ 🡪 2 Q except Φ
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NFA To DFA Conversion (Method I)
The Given NFA M = (Q, ∑ , δ ,q0, F ) can be converted to its equivalent DFA
M’ = (Q’, ∑ , δ’ ,q0, F’ ) where :

Q’ is a finite set of states= 2Q except Φ


∑ is a finite set of input symbols (alphabet)
q0 is a start state
F’ is a finite set of final states=A set of states from Q’ that contains at
least one final state of M
δ' is a transition function, which is a mapping Q’ x ∑ 🡪 Q’

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Example

o
1

O, 1
q0 q1

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Solution

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Solution

F’= set of all states in Q’ that contains at least one final state of given NFA
={ [ q1], [q0,q1] }

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Solution

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Solution

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Equivalent states
• Two or more states are said to be equivalent
states if
– They undergo the same transitions on reading
the same input symbol , and are of the same
type ie. Either final or non-final.
– Ie. All these states move to the same next state.
– The equivalent states are used to minimize DFA.
• If there are more than one equivalent states we can
remove all the equivalent states except one.

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DFA Minimization Rules

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DFA Minimization

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Further Minimization of DFA

Replace
9 by 4
12 by 7

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Further Minimization of DFA

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Further Minimization of DFA
• Unreachable States
– A state is said to be an ‘unreachable
state’ if it cannot be reached from
the initial state on reading any input
symbol. Hence must be removed.
– E.g. states 2, 3, 4, 8 are
unreachable states
• Dead States
– These are the states which has no
outgoing transitions except to
themselves. These are also called as
trap states because once entered
there is no escape.
– These dead states must be removed
in order to minimize the DFA.

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Minimized DFA

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Thus in Mealy machine, output depends on both the current state as well as current input symbol

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δ:Qx∑🡪Q λ:Qx∑🡪 Δ

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δ:Qx∑🡪Q λ:Qx∑🡪Δ

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Δ = {0,1 }

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Mealy Machine:

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Moore to Mealy machine conversion

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Mealy to Moore machine conversion

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• Convert following Mealy machine to its equivalent Moore
Machine

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