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For the Love of Tux: Linux on RISC-V

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Drew Fustini
Drew Fustini

From Make 'n Tell at xHain hackerspace in Berlin, I introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the importance of free software FPGA tools. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. I finish by talking about how Fomu is a great FPGA board to get started with!

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For the Love of Tux: Linux on RISC-V Drew Fustini drew@oshpark.com Twitter: @pdp7 Slides: https://github.com/pdp7/talks/blob/master/xhain-tux.pdf xHain Berlin hackerspace: Make ‘n Tell (2020-02-14)
● When you write a program in the Arduino IDE, it is compiled into instructions for the microcontroller to execute. ● How does the compiler know what instructions the chip understands? – defined by the Instruction Set Architecture – The ISA is a standard, a set of rules that define the tasks the processor can perform. – Examples: x86 (Intel/AMD) and ARM ● Both are proprietary and need commercial licensing
● RISC-V: Free and Open RISC Instruction Set Arch – “new instruction set architecture (ISA) that was originally designed to support computer architecture research and education and is now set to become a standard open architecture for industry”
● Keynote at Hackday Supercon 2019 by Dr. Megan Wachs of SiFive ● “RISC-V and FPGAs: Open Source Hardware Hacking” – https://www.youtube.com/watch?v=vCG5_nxm2G4
● My column in the latest Hackspace Magazine is an introduction to RISC-V and how it is enabling open source chip design: – hackspace.raspberrypi.org/issues/27/
Hackaday 2019 Supercon badge ● RISC-V “soft” core on ECP5 FPGA ● Gigantic FPGA In A Game Boy Form Factor
For the Love of Tux: Linux on RISC-V
● Hackspace Magazine column about how about open source FPGA tools developed by Claire Wolf (oe1cxw), David Shah and others have made FPGAs more accessible than ever before to makers and hackers: – hackspace.raspberrypi.org/issues/26/ Open Source and FPGAs
● Open Source toolchains for FPGAs! – Project Trellis for Lattice ECP5 – “Project Trellis and nextpnr FOSS FPGA flow for the Lattice ECP5” - David Shah (@fpga_dave) ● youtube.com/watch?v=0se7kNes3EU
● LiteX used to build cores, create SoCs and full FPGA designs. ● LiteX is based on Migen ● Migen lets you do FPGA design in Python! ● https://github.com/enjoy-digital/litex
For the Love of Tux: Linux on RISC-V
Linux on LiteX-VexRiscv ● VexRiscv: 32-bit Linux Capable RISC-V CPU ● SoC built using VexRiscv core and LiteX moduels like LiteDRAM, LiteEth, LiteSDCard, ... – github.com/litex-hub/linux-on-litex-vexriscv
“Team Linux on Badge”
“Team Linux on Badge” ● Blog post: Hackaday Supercon badge boots Linux using SDRAM cartridge – https://blog.oshpark.com/2019/12/20/boot-linux-on-this- hackaday-supercon-badge-with-this-sdram-cartridge/ ● Michael Welling (@QwertyEmedded), Tim Ansell (@mithro), Sean Cross (@xobs), Jacob Creedon (@jacobcreedon) ● First attempt: use the built-in 16MB SRAM… no luck :( – (though xobs now might have a way to do it)
“Team Linux on Badge” ● Second attempt: – Jacob Creedon designed an a cartridge board that adds 32MB of SDRAM to the Hackaday Supercon badge… before the event!
“Team Linux on Badge” ● Second attempt: – Jacob Creedon designed an a cartridge board that adds 32MB of SDRAM to the Hackaday Supercon badge… before the event!
For the Love of Tux: Linux on RISC-V
● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V
● Opened GitHub issue: – optimize performance on Hackaday Badge #35 ● https://github.com/litex-hub/litex-boards/issues/35 ● Now 10x faster! – https://asciinema.org/a/Pcm3vd1BEdEKY9srYX6Ms NfCE – Thanks to enjoy-digital
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V
● Lattice ECP5 FPGA in Adafruit Feather form factor and 128MB DDR RAM: – Orange Crab by Greg Davill ● https://github.com/gregdavill/OrangeCrab Open Source ECP5 boards
For the Love of Tux: Linux on RISC-V
● Radiona.org ULX3S ● https://www.crowdsupply.com/radiona/ulx3s Open Source ECP5 boards
Fomu – get way to learn FPGAs! ● workshop.fomu.im ● crowdsupply.com/sutajio-kosagi/fomu ● Fits in USB port ● Learn: – MicroPython – Verilog – LiteX
Designing Hardware in Python? ● Yes! ● “Using Python for creating hardware to record FOSS conferences!” ● Tim “mithro” Ansell ● youtube.com/watch?v=MkVX_mh5dOU
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V
For the Love of Tux: Linux on RISC-V

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For the Love of Tux: Linux on RISC-V

  • 1. For the Love of Tux: Linux on RISC-V Drew Fustini drew@oshpark.com Twitter: @pdp7 Slides: https://github.com/pdp7/talks/blob/master/xhain-tux.pdf xHain Berlin hackerspace: Make ‘n Tell (2020-02-14)
  • 2. ● When you write a program in the Arduino IDE, it is compiled into instructions for the microcontroller to execute. ● How does the compiler know what instructions the chip understands? – defined by the Instruction Set Architecture – The ISA is a standard, a set of rules that define the tasks the processor can perform. – Examples: x86 (Intel/AMD) and ARM ● Both are proprietary and need commercial licensing
  • 3. ● RISC-V: Free and Open RISC Instruction Set Arch – “new instruction set architecture (ISA) that was originally designed to support computer architecture research and education and is now set to become a standard open architecture for industry”
  • 4. ● Keynote at Hackday Supercon 2019 by Dr. Megan Wachs of SiFive ● “RISC-V and FPGAs: Open Source Hardware Hacking” – https://www.youtube.com/watch?v=vCG5_nxm2G4
  • 5. ● My column in the latest Hackspace Magazine is an introduction to RISC-V and how it is enabling open source chip design: – hackspace.raspberrypi.org/issues/27/
  • 6. Hackaday 2019 Supercon badge ● RISC-V “soft” core on ECP5 FPGA ● Gigantic FPGA In A Game Boy Form Factor
  • 8. ● Hackspace Magazine column about how about open source FPGA tools developed by Claire Wolf (oe1cxw), David Shah and others have made FPGAs more accessible than ever before to makers and hackers: – hackspace.raspberrypi.org/issues/26/ Open Source and FPGAs
  • 9. ● Open Source toolchains for FPGAs! – Project Trellis for Lattice ECP5 – “Project Trellis and nextpnr FOSS FPGA flow for the Lattice ECP5” - David Shah (@fpga_dave) ● youtube.com/watch?v=0se7kNes3EU
  • 10. ● LiteX used to build cores, create SoCs and full FPGA designs. ● LiteX is based on Migen ● Migen lets you do FPGA design in Python! ● https://github.com/enjoy-digital/litex
  • 12. Linux on LiteX-VexRiscv ● VexRiscv: 32-bit Linux Capable RISC-V CPU ● SoC built using VexRiscv core and LiteX moduels like LiteDRAM, LiteEth, LiteSDCard, ... – github.com/litex-hub/linux-on-litex-vexriscv
  • 13. “Team Linux on Badge”
  • 14. “Team Linux on Badge” ● Blog post: Hackaday Supercon badge boots Linux using SDRAM cartridge – https://blog.oshpark.com/2019/12/20/boot-linux-on-this- hackaday-supercon-badge-with-this-sdram-cartridge/ ● Michael Welling (@QwertyEmedded), Tim Ansell (@mithro), Sean Cross (@xobs), Jacob Creedon (@jacobcreedon) ● First attempt: use the built-in 16MB SRAM… no luck :( – (though xobs now might have a way to do it)
  • 15. “Team Linux on Badge” ● Second attempt: – Jacob Creedon designed an a cartridge board that adds 32MB of SDRAM to the Hackaday Supercon badge… before the event!
  • 16. “Team Linux on Badge” ● Second attempt: – Jacob Creedon designed an a cartridge board that adds 32MB of SDRAM to the Hackaday Supercon badge… before the event!
  • 18. ● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
  • 19. ● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
  • 20. ● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
  • 25. ● Opened GitHub issue: – optimize performance on Hackaday Badge #35 ● https://github.com/litex-hub/litex-boards/issues/35 ● Now 10x faster! – https://asciinema.org/a/Pcm3vd1BEdEKY9srYX6Ms NfCE – Thanks to enjoy-digital
  • 31. ● Lattice ECP5 FPGA in Adafruit Feather form factor and 128MB DDR RAM: – Orange Crab by Greg Davill ● https://github.com/gregdavill/OrangeCrab Open Source ECP5 boards
  • 34. Fomu – get way to learn FPGAs! ● workshop.fomu.im ● crowdsupply.com/sutajio-kosagi/fomu ● Fits in USB port ● Learn: – MicroPython – Verilog – LiteX
  • 35. Designing Hardware in Python? ● Yes! ● “Using Python for creating hardware to record FOSS conferences!” ● Tim “mithro” Ansell ● youtube.com/watch?v=MkVX_mh5dOU