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Linux on RISC-V

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Drew Fustini
Drew Fustini

This document discusses Linux running on open source hardware using RISC-V processors and FPGAs. RISC-V is an open instruction set that provides an alternative to proprietary architectures like ARM. Projects are working to run Linux on low-cost RISC-V chips from SiFive and Kendryte. FPGAs can also run a Linux-capable RISC-V soft core called VexRiscv using open source tools. Several open source boards have been developed for the Lattice ECP5 FPGA featuring RISC-V support.

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Linux on RISC-V Drew Fustini drew@oshpark.com Twitter: @pdp7 Slides: github.com/pdp7/talks/blob/master/fossn20light.pdf FOSS North 2020: Virtual Lightning Talk
● When you write a program in the Arduino IDE, it is compiled into instructions for the microcontroller to execute. ● How does the compiler know what instructions the chip understands? – defined by the Instruction Set Architecture – The ISA is a standard, a set of rules that define the tasks the processor can perform. – Examples: x86 (Intel/AMD) and ARM ● Both are proprietary and need commercial licensing
● RISC-V: Free and Open RISC Instruction Set Arch – “new instruction set architecture (ISA) that was originally designed to support computer architecture research and education and is now set to become a standard open architecture for industry”
● Keynote at Hackday Supercon 2019 by Dr. Megan Wachs of SiFive ● “RISC-V and FPGAs: Open Source Hardware Hacking” – https://www.youtube.com/watch?v=vCG5_nxm2G4
● My column in the latest Hackspace Magazine is an introduction to RISC-V and how it is enabling open source chip design: – hackspace.raspberrypi.org/issues/27/
Hackaday 2019 Supercon badge ● RISC-V “soft” core on ECP5 FPGA ● Gigantic FPGA In A Game Boy Form Factor
Linux on RISC-V
● Hackspace Magazine column about how about open source FPGA tools developed by Claire Wolf (oe1cxw), David Shah and others have made FPGAs more accessible than ever before to makers and hackers: – hackspace.raspberrypi.org/issues/26/ Open Source and FPGAs
● Open Source toolchains for FPGAs! – Project Trellis for Lattice ECP5 – “Project Trellis and nextpnr FOSS FPGA flow for the Lattice ECP5” - David Shah (@fpga_dave) ● youtube.com/watch?v=0se7kNes3EU
● LiteX used to build cores, create SoCs and full FPGA designs. ● LiteX is based on Migen ● Migen lets you do FPGA design in Python! ● https://github.com/enjoy-digital/litex
Linux on RISC-V
Linux on LiteX-VexRiscv ● VexRiscv: 32-bit Linux Capable RISC-V CPU ● SoC built using VexRiscv core and LiteX moduels like LiteDRAM, LiteEth, LiteSDCard, ... – github.com/litex-hub/linux-on-litex-vexriscv
“Team Linux on Badge”
“Team Linux on Badge” ● Blog post: Hackaday Supercon badge boots Linux using SDRAM cartridge – https://blog.oshpark.com/2019/12/20/boot-linux-on-this- hackaday-supercon-badge-with-this-sdram-cartridge/ ● Michael Welling (@QwertyEmedded), Tim Ansell (@mithro), Sean Cross (@xobs), Jacob Creedon (@jacobcreedon) ● First attempt: use the built-in 16MB SRAM… no luck :( – (though xobs now might have a way to do it)
“Team Linux on Badge” ● Second attempt: – Jacob Creedon designed an a cartridge board that adds 32MB of SDRAM to the Hackaday Supercon badge… before the event!
“Team Linux on Badge” ● Second attempt: – Jacob Creedon designed an a cartridge board that adds 32MB of SDRAM to the Hackaday Supercon badge… before the event!
Linux on RISC-V
● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
● Opened GitHub issue: – optimize performance on Hackaday Badge #35 ● https://github.com/litex-hub/litex-boards/issues/35 ● Now 10x faster! – https://asciinema.org/a/Pcm3vd1BEdEKY9srYX6Ms NfCE – Thanks to enjoy-digital
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
● Greg Davill got the screen working with LiteVideo! – twitter.com/GregDavill/status/1231082623633543168
Bonus: Open Source boards with ECP5 FPGA (can run Linux)
● Lattice ECP5 FPGA in Adafruit Feather form factor and 128MB DDR RAM: – Orange Crab by Greg Davill ● https://github.com/gregdavill/OrangeCrab ● https://groupgets.com/campaigns/710-orangecrab Open Source ECP5 boards
Linux on RISC-V
● Radiona.org ULX3S ● https://www.crowdsupply.com/radiona/ulx3s Open Source ECP5 boards
Bonus: Linux-capable RISC-V chips
SiFive ● “founded by the creators of the free and open RISC-V architecture as a reaction to the end of conventional transistor scaling and escalating chip design costs”
● FOSDEM 2018 talk – YouTube: “Igniting the Open Hardware Ecosystem with RISC-V: SiFive's Freedom U500 is the World's First Linux-capable Open Source SoC Platform” – Interview with Palmer Dabbelt of SiFive SiFive: Linux on RISC-V
● HiFive Unleashed on Crowd Supply SiFive: Linux on RISC-V
RISC-V Summit 2019: Linux on RISC V Fedora and Firmware Status Update ● https://www.youtube.com/watch?v=WC6e3g8uWdk ● Wei Fu – Software Engineer, Red Hat
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
● Linux now runs the low cost Kendryte K210 RISC-V processor – dual core 64-bit RISC-V at 400MHz with 8MB SRAM – Sipeed MAix BiT for RISC-V is only $13! – Damien Le Moal at Linux Plumbers Conf: RISC-V NOMMU and M-mode Linux ● youtube.com/watch?v=ycG592N9EMA&t=10394 ● jump to 2h 53m – Many RISC-V Improvements Ready For Linux 5.5: M- Mode, SECCOMP, Other Features – How to Build & Run Linux on Kendryte K210 RISC-V NOMMU Processor
Linux on RISC-V
Linux on RISC-V
● Sipeed now has prebuilt Linux 5.6 – https://twitter.com/SipeedIO/status/1228594799675990 016/
● Microchip PolarFire SoC FPGA – Hard RISC-V with FPGA fabric… like the Xilinx Zync for ARM ● NXP iMX with RISC-V instead of ARM! – “OpenHW Group Unveils CORE-V Chassis SoC Pr oject, Building on PULP Project IP” Coming in 2020?
Coming in 2020?
Bonus: FPGAs and Python
Fomu – great way to learn FPGAs! ● workshop.fomu.im ● crowdsupply.com/sutajio-kosagi/fomu ● Fits in USB port ● RGB LED ● Learn: – MicroPython – Verilog – LiteX
Designing Hardware in Python? ● Yes! ● “Using Python for creating hardware to record FOSS conferences!” ● Tim “mithro” Ansell ● youtube.com/watch?v=MkVX_mh5dOU
Linux on RISC-V
Linux on RISC-V
Linux on RISC-V
● Slides: github.com/pdp7/talks/blob/master/fossn20light.pdf ● e-mail: drew@oshpark.com ● 36c3 talk: media.ccc.de/v/36c3-10549-linux_on_open_source_har dware_with_open_source_chip_design

More Related Content

Linux on RISC-V

  • 1. Linux on RISC-V Drew Fustini drew@oshpark.com Twitter: @pdp7 Slides: github.com/pdp7/talks/blob/master/fossn20light.pdf FOSS North 2020: Virtual Lightning Talk
  • 2. ● When you write a program in the Arduino IDE, it is compiled into instructions for the microcontroller to execute. ● How does the compiler know what instructions the chip understands? – defined by the Instruction Set Architecture – The ISA is a standard, a set of rules that define the tasks the processor can perform. – Examples: x86 (Intel/AMD) and ARM ● Both are proprietary and need commercial licensing
  • 3. ● RISC-V: Free and Open RISC Instruction Set Arch – “new instruction set architecture (ISA) that was originally designed to support computer architecture research and education and is now set to become a standard open architecture for industry”
  • 4. ● Keynote at Hackday Supercon 2019 by Dr. Megan Wachs of SiFive ● “RISC-V and FPGAs: Open Source Hardware Hacking” – https://www.youtube.com/watch?v=vCG5_nxm2G4
  • 5. ● My column in the latest Hackspace Magazine is an introduction to RISC-V and how it is enabling open source chip design: – hackspace.raspberrypi.org/issues/27/
  • 6. Hackaday 2019 Supercon badge ● RISC-V “soft” core on ECP5 FPGA ● Gigantic FPGA In A Game Boy Form Factor
  • 8. ● Hackspace Magazine column about how about open source FPGA tools developed by Claire Wolf (oe1cxw), David Shah and others have made FPGAs more accessible than ever before to makers and hackers: – hackspace.raspberrypi.org/issues/26/ Open Source and FPGAs
  • 9. ● Open Source toolchains for FPGAs! – Project Trellis for Lattice ECP5 – “Project Trellis and nextpnr FOSS FPGA flow for the Lattice ECP5” - David Shah (@fpga_dave) ● youtube.com/watch?v=0se7kNes3EU
  • 10. ● LiteX used to build cores, create SoCs and full FPGA designs. ● LiteX is based on Migen ● Migen lets you do FPGA design in Python! ● https://github.com/enjoy-digital/litex
  • 12. Linux on LiteX-VexRiscv ● VexRiscv: 32-bit Linux Capable RISC-V CPU ● SoC built using VexRiscv core and LiteX moduels like LiteDRAM, LiteEth, LiteSDCard, ... – github.com/litex-hub/linux-on-litex-vexriscv
  • 13. “Team Linux on Badge”
  • 14. “Team Linux on Badge” ● Blog post: Hackaday Supercon badge boots Linux using SDRAM cartridge – https://blog.oshpark.com/2019/12/20/boot-linux-on-this- hackaday-supercon-badge-with-this-sdram-cartridge/ ● Michael Welling (@QwertyEmedded), Tim Ansell (@mithro), Sean Cross (@xobs), Jacob Creedon (@jacobcreedon) ● First attempt: use the built-in 16MB SRAM… no luck :( – (though xobs now might have a way to do it)
  • 15. “Team Linux on Badge” ● Second attempt: – Jacob Creedon designed an a cartridge board that adds 32MB of SDRAM to the Hackaday Supercon badge… before the event!
  • 16. “Team Linux on Badge” ● Second attempt: – Jacob Creedon designed an a cartridge board that adds 32MB of SDRAM to the Hackaday Supercon badge… before the event!
  • 18. ● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
  • 19. ● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
  • 20. ● upstream support for Hackaday Supercon badge: – https://github.com/litex-hub/litex-boards/pull/31
  • 25. ● Opened GitHub issue: – optimize performance on Hackaday Badge #35 ● https://github.com/litex-hub/litex-boards/issues/35 ● Now 10x faster! – https://asciinema.org/a/Pcm3vd1BEdEKY9srYX6Ms NfCE – Thanks to enjoy-digital
  • 30. ● Greg Davill got the screen working with LiteVideo! – twitter.com/GregDavill/status/1231082623633543168
  • 31. Bonus: Open Source boards with ECP5 FPGA (can run Linux)
  • 32. ● Lattice ECP5 FPGA in Adafruit Feather form factor and 128MB DDR RAM: – Orange Crab by Greg Davill ● https://github.com/gregdavill/OrangeCrab ● https://groupgets.com/campaigns/710-orangecrab Open Source ECP5 boards
  • 36. SiFive ● “founded by the creators of the free and open RISC-V architecture as a reaction to the end of conventional transistor scaling and escalating chip design costs”
  • 37. ● FOSDEM 2018 talk – YouTube: “Igniting the Open Hardware Ecosystem with RISC-V: SiFive's Freedom U500 is the World's First Linux-capable Open Source SoC Platform” – Interview with Palmer Dabbelt of SiFive SiFive: Linux on RISC-V
  • 38. ● HiFive Unleashed on Crowd Supply SiFive: Linux on RISC-V
  • 39. RISC-V Summit 2019: Linux on RISC V Fedora and Firmware Status Update ● https://www.youtube.com/watch?v=WC6e3g8uWdk ● Wei Fu – Software Engineer, Red Hat
  • 46. ● Linux now runs the low cost Kendryte K210 RISC-V processor – dual core 64-bit RISC-V at 400MHz with 8MB SRAM – Sipeed MAix BiT for RISC-V is only $13! – Damien Le Moal at Linux Plumbers Conf: RISC-V NOMMU and M-mode Linux ● youtube.com/watch?v=ycG592N9EMA&t=10394 ● jump to 2h 53m – Many RISC-V Improvements Ready For Linux 5.5: M- Mode, SECCOMP, Other Features – How to Build & Run Linux on Kendryte K210 RISC-V NOMMU Processor
  • 49. ● Sipeed now has prebuilt Linux 5.6 – https://twitter.com/SipeedIO/status/1228594799675990 016/
  • 50. ● Microchip PolarFire SoC FPGA – Hard RISC-V with FPGA fabric… like the Xilinx Zync for ARM ● NXP iMX with RISC-V instead of ARM! – “OpenHW Group Unveils CORE-V Chassis SoC Pr oject, Building on PULP Project IP” Coming in 2020?
  • 53. Fomu – great way to learn FPGAs! ● workshop.fomu.im ● crowdsupply.com/sutajio-kosagi/fomu ● Fits in USB port ● RGB LED ● Learn: – MicroPython – Verilog – LiteX
  • 54. Designing Hardware in Python? ● Yes! ● “Using Python for creating hardware to record FOSS conferences!” ● Tim “mithro” Ansell ● youtube.com/watch?v=MkVX_mh5dOU