Approximate Logic Synthesis and Bi-Decomposition of Sum Of Products forms

2023 Logic Synthesis and Verification Final Project

An application using Cadence IC Package

Code repository for the IWLS 2021 Programming Contest

An approximate logic synthesis tool under the maximum error constraint

The SubXPAT approximate logic synthesis framework

Wei-Shen's Fork 2023 Fall Logic Synthesis and Verification: Programming Assignments

Functionally Reduced And-Inverter Graph

A collection of the Logic Synthesis about peoples/papers/projects/tutorials...

(WIP) Training an RL model to produce synthesis recipes for logic optimization.

An implementation of binary decision tree with fringe-features extraction.

A circuit folding interface in ABC system

To generate an electrical circuit from the given input and output boolean values.

Efficient resubstitution-based approximate logic synthesis

Highly efficient delay-driven approximate logic synthesis

This article describes how embedded languages and recursion can be used to create a tool that synthesizes a relatively efficient logical circuit for any chosen permutation of the set of all bit vectors of some fixed length.

An implementation of LUT-Net learning procedure

Yosys passes to syntheize to NaN gates (à la http://tom7.org/nand/)

Microprocessor Design using Verilog HDL built and tested in Vivado Design Suite

ALMOST: Adversarial Learning to Mitigate Oracle-less ML Logic Locking Attacks via Synthesis Tuning