research-article

A full-factory simulator as a daily decision-support tool for 300mm wafer fabrication productivity

Authors:

Sugato Bagchi,

Ching-Hua Chen-Ritzo,

Sameer T. Shikalgar,

Michael TonerAuthors Info & Claims

WSC '08: Proceedings of the 40th Conference on Winter Simulation

Pages 2021 - 2029

Published: 07 December 2008 Publication History

Get Access

Abstract

We describe a discrete event simulator developed for daily prediction of WIP position in an operational 300mm wafer fabrication factory to support tactical decision-making. The simulator is distinctive in that its intended prediction horizon is relatively short, on the order of a few days, while its modeling scope is relatively large. The simulation includes over 90% of the wafers being processed in the fab and all process, measurement and testing tools. The model parameters are automatically updated using statistical analyses performed on the historical event logs generated by the factory. This paper describes the simulation model and the parameter estimation methods. A key requirement to support daily and weekly decision-making is good validation results of the simulation against actual fab performance. Therefore, we also present validation results that compare simulated production metrics against those obtained from the actual fab, for fab-wide, process, tool and product specific metrics.

References

[1]

Bureau, M., S. Dauzere-Peres, C. Yugma, L. Vermarien, and J.-B. Maria. 2007. Simulation results and formalism for global-local scheduling in semiconductor manufacturing facilities. In Proceedings of the 2007 Winter Simulation Conference, ed. S. G. Henderson, B. Biller, M.-H. Hsieh, J. Shortle, J. D. Tew, and R. R. Barton, 1768--1773.

Digital Library

Google Scholar

[2]

DeJong, C. D., and S. A. Fischbein. 2000. Integrating dynamic fab capacity and automation models for 300mm semiconductor manufacturing. In Proceedings of the 2000 Winter Simulation Conference, ed. J. A. Joines, R. R. Barton, K. Kang, and P. A. Fishwick, 1505--1509.

Digital Library

Google Scholar

[3]

Johnson, R. T., J. W. Fowler, and G. T. Mackulak. 2005. A discrete event simulation model simplification technique. In Proceedings of the 2005 Winter Simulation Conference, ed. M. E. Kuhl, N. M. Steiger, F. B. Armstrong, and J. A. Joines, 2172--2176.

Digital Library

Google Scholar

[4]

Klein, M., and A. Kalir. 2006. Improved simple simulation models for semiconductor wafer factories. In Proceedings of the 2006 Winter Simulation Conference, ed. L. F. Perrone, F. P. Wieland, J. Liu, B. G. Lawson, D. M. Nicol, and R. M. Fujimoto, 1836--1839.

Google Scholar

[5]

Mason, S. J., and P. A. Jensen. 1996. A comparison study of the logic of four wafer fabrication simulators. In Proceedings of the 1996 Winter Simulation Conference, ed. J. M. Charnes, D. J. Morrice, D. T. Brunner, and J. J. Swain, 1031--1038.

Digital Library

Google Scholar

[6]

Pillai, D. D. 2006. The future of semiconductor manufacturing. IEEE Robotics Automation Magazine 13 (4): 16--24.

Crossref

Google Scholar

[7]

Pillai, D. D., E. L. Bass, J. C. Dempsey, and E. J. Yellig. 2004. 300-mm full-factory simulations for 90- and 65-nm ic manufacturing. IEEE Transactions on Semiconductor Manufacturing 17 (3): 292--298.

Crossref

Google Scholar

[8]

Rose, O. 2007. Improved simple simulation models for semiconductor wafer factories. In Proceedings of the 2007 Winter Simulation Conference, ed. S. G. Henderson, B. Biller, M.-H. Hsieh, J. Shortle, J. D. Tew, and R. R. Barton, 2708--2712.

Digital Library

Google Scholar

[9]

Sivakumar, A. I., and C. S. Chong. 2001. A simulation based analysis of cycle time distribution, and throughput in semiconductor backend manufacturing. Computers in Industry 45 (1): 59--78.

Crossref

Google Scholar

[10]

Yario, J. 2005. 2005 top fab: IBM. Semiconductor International.

Google Scholar

Cited By

View all

Seidel GLee CTang ALow SGan BScholl W(2020)Challenges associated with realization of lot level fab out forecast in a giga wafer fabrication plantProceedings of the Winter Simulation Conference10.5555/3466184.3466384(1777-1788)Online publication date: 14-Dec-2020
https://dl.acm.org/doi/10.5555/3466184.3466384
Pfeiffer AGyulai DSzaller ÁMonostori LJohansson BJain S(2018)Production log data analysis for reject rate prediction and workload estimationProceedings of the 2018 Winter Simulation Conference10.5555/3320516.3320914(3364-3374)Online publication date: 9-Dec-2018
https://dl.acm.org/doi/10.5555/3320516.3320914
Seidel GLee CKam AGan BChan CNaumann APreuss P(2017)Harmonizing operations management of key stakeholders in wafer fab using discrete event simulationProceedings of the 2017 Winter Simulation Conference10.5555/3242181.3242500(1-9)Online publication date: 3-Dec-2017
https://dl.acm.org/doi/10.5555/3242181.3242500
Show More Cited By

A full-factory simulator as a daily decision-support tool for 300mm wafer fabrication productivity
1. Applied computing

Recommendations

Fabrication and application of a full wafer size micro/nanostencil for multiple length-scale surface patterning

A tool and method for flexible and rapid surface patterning technique beyond lithography based on high-resolution shadow mask method, or nanostencil, is presented. This new type of miniaturized shadow mask is fabricated by a combination of MEMS ...
Three dimensional on 300mm wafer scale nano imprint lithography processes

A three dimensional 300mm wafer scale nano imprinting lithography was developed. Two process flows were investigated to manufacture sub 100nm resolution multilevel silicon stamps. Using 193nm optical lithography and dry etching processes in a standard ...
Template replication for full wafer imprint lithography

Typically, the Step and Flash Imprint Lithography (S-FIL^T^M) process uses field-to-field drop dispensing of UV-curable liquids for step-and-repeat patterning. Several applications, including patterned magnetic media, photonic crystals, and wire grid ...

Comments

Information & Contributors

Information

Published In

WSC '08: Proceedings of the 40th Conference on Winter Simulation

December 2008

3189 pages

ISBN:9781424427086

Editors:
Scott Mason
University of Arkansas
,
Ray Hill
Air Force Institute of Technology
,
Lars Mönch
University of Hagen
,
Oliver Rose
University of Dresden
,
General Chair:
Thomas Jefferson
Intel Corporation
,
Program Chairs:
John W. Fowler
Arizona State University
,
Ricki G. Ingalls
Oklahoma State University

Publisher

Winter Simulation Conference

Publication History

Published: 07 December 2008

Check for updates

Qualifiers

Research-article

Conference

WSC08

Sponsor:

IIE
INFORMS-SIM
ASA
IEEE/SMC
SIGSIM
NIST
(SCS)

WSC08: Winter Simulation Conference

December 7 - 10, 2008

Florida, Miami

Acceptance Rates

WSC '08 Paper Acceptance Rate 249 of 304 submissions, 82%;

Overall Acceptance Rate 3,413 of 5,075 submissions, 67%

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

11
Total Citations
View Citations
133
Total Downloads

Downloads (Last 12 months)4
Downloads (Last 6 weeks)0

Reflects downloads up to 23 Dec 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Seidel GLee CTang ALow SGan BScholl W(2020)Challenges associated with realization of lot level fab out forecast in a giga wafer fabrication plantProceedings of the Winter Simulation Conference10.5555/3466184.3466384(1777-1788)Online publication date: 14-Dec-2020
https://dl.acm.org/doi/10.5555/3466184.3466384
Pfeiffer AGyulai DSzaller ÁMonostori LJohansson BJain S(2018)Production log data analysis for reject rate prediction and workload estimationProceedings of the 2018 Winter Simulation Conference10.5555/3320516.3320914(3364-3374)Online publication date: 9-Dec-2018
https://dl.acm.org/doi/10.5555/3320516.3320914
Seidel GLee CKam AGan BChan CNaumann APreuss P(2017)Harmonizing operations management of key stakeholders in wafer fab using discrete event simulationProceedings of the 2017 Winter Simulation Conference10.5555/3242181.3242500(1-9)Online publication date: 3-Dec-2017
https://dl.acm.org/doi/10.5555/3242181.3242500
Fordyce KFournier JMilne RSingh HRose OUhrmacher A(2012)TutorialProceedings of the Winter Simulation Conference10.5555/2429759.2430035(1-16)Online publication date: 9-Dec-2012
https://dl.acm.org/doi/10.5555/2429759.2430035
Pfeiffer AKádár BPopovics GKardos CVén ZKemény LMonostori LRose OUhrmacher A(2012)Applying model-reconstruction by exploring MES and PLC data for simulation support of production systemsProceedings of the Winter Simulation Conference10.5555/2429759.2429954(1-13)Online publication date: 9-Dec-2012
https://dl.acm.org/doi/10.5555/2429759.2429954
Scholl WNoack DRose OGan BLendermann PPreuss PPappert F(2011)Implementation of a simulation-based short-term lot arrival forecast in a mature 200mm semiconductor fabProceedings of the Winter Simulation Conference10.5555/2431518.2431747(1932-1943)Online publication date: 11-Dec-2011
https://dl.acm.org/doi/10.5555/2431518.2431747
Noack DMosinski MRose OLendermann PGan BScholl W(2011)Challenges and solution approaches for the online simulation of semiconductor wafer fabsProceedings of the Winter Simulation Conference10.5555/2431518.2431735(1845-1856)Online publication date: 11-Dec-2011
https://dl.acm.org/doi/10.5555/2431518.2431735
Mosinski MNoack DPappert FRose OScholl W(2011)Cluster based analytical method for the lot delivery forecast in semiconductor fab with wide product rangeProceedings of the Winter Simulation Conference10.5555/2431518.2431734(1834-1844)Online publication date: 11-Dec-2011
https://dl.acm.org/doi/10.5555/2431518.2431734
Scholl WNoack DRose OGan BLi Peh MLendermann PPreuss PYücesan E(2010)Towards realization of a high-fidelity simulation model for short-term horizon forecasting in wafer fabrication facilitiesProceedings of the Winter Simulation Conference10.5555/2433508.2433825(2563-2574)Online publication date: 5-Dec-2010
https://dl.acm.org/doi/10.5555/2433508.2433825
Davenport A(2010)Integrated maintenance scheduling for semiconductor manufacturingProceedings of the 7th international conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems10.1007/978-3-642-13520-0_12(92-96)Online publication date: 14-Jun-2010
https://dl.acm.org/doi/10.1007/978-3-642-13520-0_12
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Recommendations

Fabrication and application of a full wafer size micro/nanostencil for multiple length-scale surface patterning

Three dimensional on 300mm wafer scale nano imprint lithography processes

Template replication for full wafer imprint lithography

Comments

Published In

Sponsors

Publisher

Publication History

Check for updates

Qualifiers

Conference

Acceptance Rates

Other Metrics

Article Metrics

Other Metrics

Cited By

Login options

Full Access

PDF

eReader

Abstract

References

Cited By

Recommendations

Fabrication and application of a full wafer size micro/nanostencil for multiple length-scale surface patterning

Three dimensional on 300mm wafer scale nano imprint lithography processes

Template replication for full wafer imprint lithography

Comments

Information

Published In

Sponsors

Publisher

Publication History

Check for updates

Qualifiers

Conference

Acceptance Rates

Contributors

Other Metrics

Bibliometrics

Article Metrics

Other Metrics

Citations

Cited By

Login options

Full Access

View options

PDF

eReader

Figures

Other

Share

Share this Publication link

Share on social media

Affiliations