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Scheduling of conditional process graphs for the synthesis of embedded systems

Authors:

P. Eles,

K. Kuchcinski,

Z. Peng,

A. Doboli,

P. PopAuthors Info & Claims

DATE '98: Proceedings of the conference on Design, automation and test in Europe

Pages 132 - 139

Published: 23 February 1998 Publication History

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Abstract

We present an approach to process scheduling based on an abstract graph representation which captures both dataflow and the flow of control. Target architectures consist of several processors, ASICs and shared busses. We have developed a heuristic which generates a schedule table so that the worst case delay is minimized. Several experiments demonstrate the efficiency of the approach.

References

[1]

T.M. Chen, S.S. Liu, ATM Switching Systems, ArtechHouse Books, 1995.

Digital Library

Google Scholar

[2]

P. Chou, G. Boriello, "Interval Scheduling: Fine-Grained Code Scheduling for Embedded Systemsln, Proc. ACM/IEEE DAC, 1995, 462-467.

Digital Library

Google Scholar

[3]

E.G. Coffman Jr., R.L. Graham, "Optimal Scheduling for two Processor Systems", Acta Informatica, 1, 1972, 200-213.

Digital Library

Google Scholar

[4]

P. Eles, Z. Peng, K. Kuchcinski, A. Doboli, "System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Searchle, Des. Aut. for Emb. Syst., V2, N1, 1997, 5-32.

Google Scholar

[5]

P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, P. Pop, "Process Scheduling for Performance Estimation and Synthesis of Embedded Systemsls, Research Report, Department of Computer and Information Science, Link~ping University, 1997.

Google Scholar

[6]

R. K. Gupta, G. De Micheli, "A Co-Synthesis Approach to Embedded System Design Automationls, Des. Aut. for Emb. Syst., V1, N1/2, 1996, 69-120.

Digital Library

Google Scholar

[7]

H. Kasahara, S. Narita, "Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing", IEEE Trans. on Comp., V33, N11, 1984, 1023-1029.

Google Scholar

[8]

K. Kuchcinski, "Embedded System Synthesis by Timing Constraint Solving", Proc. Int. Symp. on Syst. Synth., 1997.

Digital Library

Google Scholar

[9]

Y.K. Kwok, I. Ahmad, "Dynamic Critical-Path Scheduling: an Effective Technique for Allocating Task Graphs to Multiprocessors", IEEETrans. on Par. & Distr. Syst., V7, N5, 1996, 506-521.

Digital Library

Google Scholar

[10]

Y. S. Li, S. Malik, "Performance Analysis of Embedded Software Using Implicit Path Enumerationle, Proc. ACM/IEEE Design Automation Conference, 1995, 456-461.

Digital Library

Google Scholar

[11]

S. Prakash, A. Parker, "SOS: Synthesis of Application-Specific Heterogeneous Multiprocessor Systemslc, Journal of Parallel and Distrib. Comp., V16, 1992, 338-351.

Digital Library

Google Scholar

[12]

K. Suzuki, A. Sangiovanni-Vincentelli, iaEfficient Software Performance Estimation Methods for Hardware/Software Codesignla, Proc. ACM/IEEE DAC, -96, 605-610.

Digital Library

Google Scholar

[13]

J.D. Ullman, "NP-Complete Scheduling Problems", Journal of Comput. Syst. Sci., 10, 384-393, 1975.

Digital Library

Google Scholar

[14]

T. Y. Yen, W. Wolf, Hardware-Software Co-Synthesis of DistributedEmbeddedSystems, Kluwer Academic Publisher, 1997.

Digital Library

Google Scholar

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Neshatpour KMokrani HSasan AGhasemzadeh HRafatirad SHomayoun HMudge TPnevmatikatos D(2018)Architectural considerations for FPGA acceleration of machine learning applications in MapReduceProceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation10.1145/3229631.3229639(89-96)Online publication date: 15-Jul-2018
https://dl.acm.org/doi/10.1145/3229631.3229639
Laalaoui YBouguila N(2014)ReviewExpert Systems with Applications: An International Journal10.1016/j.eswa.2013.09.01841:5(2196-2210)Online publication date: 1-Apr-2014
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Potop-Butucaru DAzim AFischmeister SCarloni LTripakis S(2010)Semantics-preserving implementation of synchronous specifications over dynamic TDMA distributed architecturesProceedings of the tenth ACM international conference on Embedded software10.1145/1879021.1879048(199-208)Online publication date: 24-Oct-2010
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DATE '98: Proceedings of the conference on Design, automation and test in Europe

February 1998

940 pages

ISBN:0818683597

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IEEE Computer Society

United States

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Published: 23 February 1998

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DATE98: Design, Automation & Test in Europe

February 23 - 26, 1998

Le Palais des Congrés de Paris, France

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Neshatpour KMokrani HSasan AGhasemzadeh HRafatirad SHomayoun HMudge TPnevmatikatos D(2018)Architectural considerations for FPGA acceleration of machine learning applications in MapReduceProceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation10.1145/3229631.3229639(89-96)Online publication date: 15-Jul-2018
https://dl.acm.org/doi/10.1145/3229631.3229639
Laalaoui YBouguila N(2014)ReviewExpert Systems with Applications: An International Journal10.1016/j.eswa.2013.09.01841:5(2196-2210)Online publication date: 1-Apr-2014
https://dl.acm.org/doi/10.1016/j.eswa.2013.09.018
Potop-Butucaru DAzim AFischmeister SCarloni LTripakis S(2010)Semantics-preserving implementation of synchronous specifications over dynamic TDMA distributed architecturesProceedings of the tenth ACM international conference on Embedded software10.1145/1879021.1879048(199-208)Online publication date: 24-Oct-2010
https://dl.acm.org/doi/10.1145/1879021.1879048
Eles PIzosimov VPop PPeng ZSciuto D(2008)Synthesis of fault-tolerant embedded systemsProceedings of the conference on Design, automation and test in Europe10.1145/1403375.1403644(1117-1122)Online publication date: 10-Mar-2008
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Malani PMukre PQiu QWu QSciuto D(2008)Adaptive scheduling and voltage scaling for multiprocessor real-time applications with non-deterministic workloadProceedings of the conference on Design, automation and test in Europe10.1145/1403375.1403532(652-657)Online publication date: 10-Mar-2008
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Ruggiero MGuerri ABertozzi DMilano MBenini L(2008)A fast and accurate technique for mapping parallel applications on stream-oriented MPSoC platforms with communication awarenessInternational Journal of Parallel Programming10.1007/s10766-007-0032-736:1(3-36)Online publication date: 1-Feb-2008
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Dolif ELombardi MRuggiero MMilano MBenini LKirsch CWilhelm R(2007)Communication-aware stochastic allocation and scheduling framework for conditional task graphs in multi-processor systems-on-chipProceedings of the 7th ACM & IEEE international conference on Embedded software10.1145/1289927.1289940(47-56)Online publication date: 30-Sep-2007
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Luo JJha NPeh L(2007)Simultaneous dynamic voltage scaling of processors and communication links in real-time distributed embedded systemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.89366015:4(427-437)Online publication date: 1-Apr-2007
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Ruggiero MGuerri ABertozzi DPoletti FMilano MGielen G(2006)Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chipProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131486(3-8)Online publication date: 6-Mar-2006
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Jhumka AKlaus SHuss S(2005)A Dependability-Driven System-Level Design Approach for Embedded SystemsProceedings of the conference on Design, Automation and Test in Europe - Volume 110.1109/DATE.2005.10(372-377)Online publication date: 7-Mar-2005
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Rapid-Prototyping of Embedded Systems via Reprogrammable Devices

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Rapid-Prototyping of Embedded Systems via Reprogrammable Devices

SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications

Synthesis of application-specific highly efficient multi-mode cores for embedded systems

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