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Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops

Published: 20 March 2004 Publication History

Abstract

Traditionally, software pipelining is applied either to theinnermost loop of a given loop nest or from the innermostloop to the outer loops. In a companion paper, we proposeda scheduling method, called Single-dimension SoftwarePipelining (SSP), to software pipeline a multi-dimensionalloop nest at an arbitrary loop level.In this paper, we describe our solution to SSP code generation.In contrast to traditional software pipelining, SSPhandles two distinct repetitive patterns, and thus requiresnew code generation algorithms. Further, these two distinctrepetitive patterns complicate register assignment and requiretwo levels of register renaming. As rotating registerssupport renaming at only one level, our solution is based ona combination of dynamic register renaming (using rotatingregisters) and static register renaming (using code replication).Finally, code size increase, an even more important issuefor SSP than for traditional software-pipelining, is alsoaddressed. Optimizations are proposed to reduce code sizewithout significant performance degradation.We first present a code generation scheme and subsequentlyimplement it for the IA-64 architecture, making effectiveuse of rotating registers and predicated execution.We present some initial experimental results, which demonstratenot only the feasibility and correctness of our codegeneration scheme, but also its code quality.

References

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Cited By

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  • (2011)Using a "codelet" program execution model for exascale machinesProceedings of the 1st International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era10.1145/2000417.2000424(64-69)Online publication date: 5-Jun-2011
  • (2008)Register allocation for software pipelined multidimensional loopsACM Transactions on Programming Languages and Systems10.1145/1377492.137749830:4(1-68)Online publication date: 1-Aug-2008
  • (2007)Single-dimension software pipelining for multidimensional loopsACM Transactions on Architecture and Code Optimization10.1145/1216544.12165504:1(7-es)Online publication date: 1-Mar-2007
  • Show More Cited By

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Published In

cover image ACM Conferences
CGO '04: Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
March 2004
301 pages
ISBN:0769521029

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IEEE Computer Society

United States

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Published: 20 March 2004

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CGO04

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CGO '04 Paper Acceptance Rate 25 of 79 submissions, 32%;
Overall Acceptance Rate 312 of 1,061 submissions, 29%

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Cited By

View all
  • (2011)Using a "codelet" program execution model for exascale machinesProceedings of the 1st International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era10.1145/2000417.2000424(64-69)Online publication date: 5-Jun-2011
  • (2008)Register allocation for software pipelined multidimensional loopsACM Transactions on Programming Languages and Systems10.1145/1377492.137749830:4(1-68)Online publication date: 1-Aug-2008
  • (2007)Single-dimension software pipelining for multidimensional loopsACM Transactions on Architecture and Code Optimization10.1145/1216544.12165504:1(7-es)Online publication date: 1-Mar-2007
  • (2006)Hierarchical multithreadingProceedings of the 20th international conference on Parallel and distributed processing10.5555/1898699.1898800(281-281)Online publication date: 25-Apr-2006
  • (2006)Multi-dimensional kernel generation for loop nest software pipeliningProceedings of the 12th international conference on Parallel Processing10.1007/11823285_32(311-322)Online publication date: 28-Aug-2006
  • (2005)Register allocation for software pipelined multi-dimensional loopsProceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation10.1145/1065010.1065030(154-167)Online publication date: 12-Jun-2005
  • (2005)Register allocation for software pipelined multi-dimensional loopsACM SIGPLAN Notices10.1145/1064978.106503040:6(154-167)Online publication date: 12-Jun-2005
  • (2005)Register pressure in software-pipelined loop nestsProceedings of the 18th international conference on Languages and Compilers for Parallel Computing10.1007/978-3-540-69330-7_2(17-31)Online publication date: 20-Oct-2005
  • (2005)Combined ILP and register tilingProceedings of the 18th international conference on Languages and Compilers for Parallel Computing10.1007/978-3-540-69330-7_17(244-258)Online publication date: 20-Oct-2005
  • (2004)Single-Dimension Software Pipelining for Multi-Dimensional LoopsProceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization10.5555/977395.977657Online publication date: 20-Mar-2004

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