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ORCIDAhmad A. Al-Yamani
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2010 – 2019
- 2010
[j9]Ahmad A. Al-Yamani, Edward J. McCluskey:
Test Set Compression Through Alternation Between Deterministic and Pseudorandom Test Patterns. J. Electron. Test. 26(5): 513-521 (2010)
2000 – 2009
- 2009
- [j8]Aiman H. El-Maleh
, Mustafa Imran Ali, Ahmad A. Al-Yamani:
Reconfigurable broadcast scan compression using relaxation-based test vector decomposition. IET Comput. Digit. Tech. 3(2): 143-161 (2009) - [c20]Costas Argyrides, Ahmad A. Al-Yamani, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan:
Increasing memory yield in future technologies through innovative design. ISQED 2009: 622-626 - 2008
- [j7]Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda:
Comparative study of centralised and distributed compatibility-based test data compression. IET Comput. Digit. Tech. 2(2): 108-117 (2008) - 2007
- [j6]Ahmad A. Al-Yamani:
Energy-delay efficient test. IET Comput. Digit. Tech. 1(5): 653-658 (2007) - [j5]Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Erik Chmelar, M. Grinchuk, Arun Gunda:
Scan Test Cost and Power Reduction Through Systematic Scan Reconfiguration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5): 907-918 (2007) - [j4]Ahmad A. Al-Yamani, S. Ramsundar, Dhiraj K. Pradhan:
A Defect Tolerance Scheme for Nanotechnology Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11): 2402-2409 (2007) - [c19]Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda:
Systematic Scan Reconfiguration. ASP-DAC 2007: 738-743 - [c18]Aiman H. El-Maleh, Mustafa Imran Ali, Ahmad A. Al-Yamani:
A Reconfigurable Broadcast Scan Compression Scheme Using Relaxation Based Test Vector Decompos. ATS 2007: 91-94 - [c17]S. Ramsundar, Ahmad A. Al-Yamani, Dhiraj K. Pradhan:
Defect Tolerance in Nanotechnology Switches Using a Greedy Reconfiguration Algorithm. ISQED 2007: 807-813 - [c16]Costas Argyrides, Ahmad A. Al-Yamani, Dhiraj K. Pradhan:
High defect tolerant low cost memory chips. SoCC 2007: 119-122 - 2006
- [c15]Ahmad A. Al-Yamani:
DFT for controlled-impedance I/O buffers. DAC 2006: 405-410 - 2005
- [j3]Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey:
Optimized reseeding by seed ordering and encoding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(2): 264-270 (2005) - [j2]Ahmad A. Al-Yamani, Edward J. McCluskey:
Test chip experimental results on high-level structural test. ACM Trans. Design Autom. Electr. Syst. 10(4): 690-701 (2005) - [c14]Ahmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda:
Should Illinois-Scan Based Architectures be Centralized or Distributed? DFT 2005: 406-414 - [c13]Ahmad A. Al-Yamani, Edward J. McCluskey:
BIST-Guided ATPG. ISQED 2005: 244-249 - [c12]Intaik Park, Ahmad A. Al-Yamani, Edward J. McCluskey:
Effective TARO Pattern Generation. VTS 2005: 161-166 - [c11]Ahmad A. Al-Yamani, Erik Chmelar, Mikhail Grinchuck:
Segmented Addressable Scan Architecture. VTS 2005: 405-411 - 2004
- [c10]Ahmad A. Al-Yamani, Edward J. McCluskey:
Test quality for high level structural test. HLDVT 2004: 109-114 - [c9]Edward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, François-Fabien Ferhani, Edward Li, Subhasish Mitra:
ELF-Murphy Data on Defects and Test Sets. VTS 2004: 16-22 - 2003
- [c8]Ahmad A. Al-Yamani, Edward J. McCluskey:
Seed encoding with LFSRs and cellular automata. DAC 2003: 560-565 - [c7]Ahmad A. Al-Yamani, Sadiq M. Sait, Hassan R. Barada, Habib Youssef:
Parallel Tabu Search in a Heterogeneous Environment. IPDPS 2003: 56 - [c6]Ahmad A. Al-Yamani, Edward J. McCluskey:
Built-In Reseeding for Serial Bist. VTS 2003: 63-68 - [c5]Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey:
Bist Reseeding with very few Seeds. VTS 2003: 69-76 - 2002
- [j1]Ahmad A. Al-Yamani, Sadiq M. Sait, Habib Youssef, Hassan R. Barada:
Parallelizing Tabu Search on a Cluster of Heterogeneous Workstations. J. Heuristics 8(3): 277-304 (2002) - [c4]Ahmad A. Al-Yamani, Sadiq M. Sait, Hassan R. Barada:
HPTS: heterogeneous parallel tabu search for VLSI placement. IEEE Congress on Evolutionary Computation 2002: 351-355 - [c3]Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey:
Testing Digital Circuits with Constraints. DFT 2002: 195-206 - 2001
- [c2]Ahmad A. Al-Yamani, Nahmsuk Oh, Edward J. McCluskey:
Performance Evaluation of Checksum-Based ABFT. DFT 2001: 461- - 2000
- [c1]Sadiq M. Sait, Habib Youssef, Hassan R. Barada, Ahmad A. Al-Yamani:
A parallel tabu search algorithm for VLSI standard-cell placement. ISCAS 2000: 581-584
Coauthor Index
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