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ORCIDBibhash Sen
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- affiliation: National Institute of Technology Durgapur, Department of Computer Science and Engineering, India
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2020 – today
- 2024
[j33]Sandip Chakraborty
, Archisman Ghosh, Anindan Mondal, Bibhash Sen:
Towards the Detection of Hardware Trojans with Cost Effective Test Vectors using Genetic Algorithm. J. Electron. Test. 40(3): 371-385 (2024)- [j32]Mahabub Hasan Mahalat, Shyam Subba, Anindan Mondal, Biplab K. Sikdar, Rajat Subhra Chakraborty, Bibhash Sen:
CAPUF: Design of a configurable circular arbiter PUF with enhanced security and hardware efficiency. Integr. 95: 102113 (2024) - [j31]Anindan Mondal, Archisman Ghosh, Shubrojyoti Karmakar, Mahabub Hasan Mahalat, Suchismita Roy, Bibhash Sen:
Identification of Hardware Trojan in Gate-Level Netlist. J. Circuits Syst. Comput. 33(9) (2024) - [j30]Sourav Roy, Dipnarayan Das, Bibhash Sen:
Secure and Lightweight Authentication Protocol Using PUF for the IoT-based Wireless Sensor Network. ACM J. Emerg. Technol. Comput. Syst. 20(1): 3:1-3:17 (2024) - [c27]Amit Kumar Pramanik, Jayanta Pal, Bibhash Sen:
Synthesis of Fault-Tolerant QCA Logic Circuit Using Cellular Automata. ASCAT 2024: 182-191 - 2023
- [j29]Abhishek Kesarwani, Sunanda Das, Mamata Dalui, Dakshina Ranjan Kisku, Bibhash Sen, Suchismita Roy, Anupam Basu:
Non-invasive anaemia detection by examining palm pallor: A smartphone-based approach. Biomed. Signal Process. Control. 79(Part): 104045 (2023) - [j28]Sunanda Das, Abhishek Kesarwani, Mamata Dalui, Dakshina Ranjan Kisku, Bibhash Sen, Suchismita Roy, Anupam Basu:
Smartphone-based non-invasive haemoglobin level estimation by analyzing nail pallor. Biomed. Signal Process. Control. 85: 104959 (2023) - [j27]Sourav Roy, Dipnarayan Das, Anindan Mondal, Mahabub Hasan Mahalat, Bibhash Sen, Biplab Sikdar:
PLAKE: PUF-Based Secure Lightweight Authentication and Key Exchange Protocol for IoT. IEEE Internet Things J. 10(10): 8547-8559 (2023) - [j26]Anindan Mondal, Debasish Kalita, Archisman Ghosh, Suchismita Roy, Bibhash Sen:
Toward the Generation of Test Vectors for the Detection of Hardware Trojan Targeting Effective Switching Activity. ACM J. Emerg. Technol. Comput. Syst. 19(4): 29:1-29:16 (2023) - [j25]Anindan Mondal, Shubrojyoti Karmakar, Mahabub Hasan Mahalat, Suchismita Roy, Bibhash Sen, Anupam Chattopadhyay:
Hardware Trojan Detection using Transition Probability with Minimal Test Vectors. ACM Trans. Embed. Comput. Syst. 22(1): 11:1-11:21 (2023) - [j24]Amit Kumar Pramanik, Mahabub Hasan Mahalat, Jayanta Pal, Seyed-Sajad Ahmadpour, Bibhash Sen:
Cost-effective synthesis of QCA logic circuit using genetic algorithm. J. Supercomput. 79(4): 3850-3877 (2023) - [c26]Amit Kumar Pramanik, Sudipta Debnath, Jayanta Pal, Bibhash Sen:
Design and Analysis of Regular Clock Based 2: 4 Decoder Using T-Gate in QCA. ASCAT 2023: 81-91 - 2022
- [j23]Amit Kumar Pramanik, Dhrubajyoti Bhowmik, Jayanta Pal, Pinaki Sen, Apu Kumar Saha, Bibhash Sen:
Towards the realization of regular clocking-based QCA circuits using genetic algorithm. Comput. Electr. Eng. 97: 107640 (2022) - [j22]Dhrubajyoti Bhowmik, Amit Kumar Pramanik, Jayanta Pal, Pinaki Sen, Ayush Ranjan Singh, Apu Kumar Saha, Bibhash Sen:
Regular clocking-based Automated Cell Placement technique in QCA targeting sequential circuit. Comput. Electr. Eng. 98: 107668 (2022) - [j21]Mahabub Hasan Mahalat, Dipankar Karmakar, Anindan Mondal, Bibhash Sen:
PUF based Secure and Lightweight Authentication and Key-Sharing Scheme for Wireless Sensor Network. ACM J. Emerg. Technol. Comput. Syst. 18(1): 9:1-9:23 (2022) - [j20]Mahabub Hasan Mahalat, Suraj Mandal, Anindan Mondal, Bibhash Sen, Rajat Subhra Chakraborty:
Implementation, Characterization and Application of Path Changing Switch based Arbiter PUF on FPGA as a lightweight Security Primitive for IoT. ACM Trans. Design Autom. Electr. Syst. 27(3): 26:1-26:26 (2022) - [c25]Amit Kumar Pramanik, Jayanta Pal, Biplab K. Sikdar, Bibhash Sen:
Performance Analysis of Regular Clocking Based Quantum-Dot Cellular Automata Logic Circuit: Fault Tolerant Approach. ACRI 2022: 185-198 - [c24]Amit Kumar Pramanik, Jayanta Pal, Bibhash Sen:
Impact of Genetic Algorithm on Low Power QCA Logic Circuit with Regular Clocking. ASCAT 2022: 191-203 - [c23]Dipnarayan Das, Sourav Roy, Mahabub Hasan Mahalat, Bibhash Sen:
A Novel Cross-Platform Physically Unclonable Function for Emerging FPGA-based IoT Devices. AsianHOST 2022: 1-4 - 2021
- [j19]Anindan Mondal, Rajesh Kumar Biswal, Mahabub Hasan Mahalat, Suchismita Roy, Bibhash Sen:
Hardware Trojan Free Netlist Identification: A Clustering Approach. J. Electron. Test. 37(3): 317-328 (2021) - [j18]Dhrubajyoti Bhowmik, Jayanta Pal, Mrinal Goswami, Pinaki Sen, Apu Kumar Saha, Bibhash Sen:
Systematic cell placement in quantum-dot cellular automata embedding underlying regular clocking circuit. IET Circuits Devices Syst. 15(2): 156-167 (2021) - [j17]Jayanta Pal, Mrinal Goswami, Apu Kumar Saha, Bibhash Sen:
CFA: Toward the Realization of Conservative Full Adder in QCA with Enhanced Reliability. J. Circuits Syst. Comput. 30(10): 2150172:1-2150172:33 (2021) - [j16]Jayanta Pal, Mrinal Goswami, Apu Kumar Saha, Bibhash Sen:
CFA: Toward the Realization of Conservative Full Adder in QCA with Enhanced Reliability. J. Circuits Syst. Comput. 30(11): 2192001:1 (2021) - [c22]Sourav Roy, Dipnarayan Das, Anindan Mondal, Mahabub Hasan Mahalat, Suchismita Roy, Bibhash Sen:
PUF based Lightweight Authentication and Key Exchange Protocol for IoT. SECRYPT 2021: 698-703 - 2020
- [j15]Mrinal Goswami, Jayanta Pal, Mayukh Roy Choudhury, Pritam P. Chougule, Bibhash Sen:
In memory computation using quantum-dot cellular automata. IET Comput. Digit. Tech. 14(6): 336-343 (2020) - [j14]Mrinal Goswami, Subrata Chattopadhyay, Shiv Bhushan Tripathi, Bibhash Sen:
Design of fault tolerant majority voter for error resilient TMR targeting micro to nano scale logic. Int. J. Comput. Sci. Eng. 21(3): 375-393 (2020)
2010 – 2019
- 2019
- [j13]Shukla Banik, Suchismita Roy, Bibhash Sen:
An Integrated Framework for Application Independent Testing of FPGA Interconnect. J. Electron. Test. 35(5): 729-740 (2019) - [j12]Shukla Banik, Suchismita Roy, Bibhash Sen:
Application-Dependent Testing of FPGA Interconnect Network. IEEE Trans. Very Large Scale Integr. Syst. 27(10): 2296-2304 (2019) - [c21]Anindan Mondal, Mahabub Hasan Mahalat, Suraj Mandal, Suchismita Roy, Bibhash Sen:
A Novel Test Vector Generation Method for Hardware Trojan Detection. SoCC 2019: 80-85 - [c20]Mahabub Hasan Mahalat, Suraj Mandal, Anindan Mondal, Bibhash Sen:
An Efficient Implementation of Arbiter PUF on FPGA for IoT Application. SoCC 2019: 324-329 - [c19]Mrinal Goswami, Mayukh Roy Choudhury, Bibhash Sen:
A Realistic Configurable Level Triggered Flip-Flop in Quantum-Dot Cellular Automata. VDAT 2019: 455-467 - [c18]Shukla Banik, Suchismita Roy, Bibhash Sen:
Test Configuration Generation for Different FPGA Architectures for Application Independent Testing. VLSID 2019: 395-400 - 2018
- [c17]Mahabub Hasan Mahalat, Shreya Saha, Anindan Mondal, Bibhash Sen:
A PUF based Light Weight Protocol for Secure WiFi Authentication of IoT devices. ISED 2018: 183-187 - [c16]Anindan Mondal, Mahabub Hasan Mahalat, Anudeep Reddy Medapati, Suchismita Roy, Bibhash Sen:
XOR based Methodology to Detect Hardware Trojan utilizing the Transition Probability. ISED 2018: 215-219 - [c15]Mrinal Goswami, Govind Raj, Aron Narzary, Bibhash Sen:
A Methodology to Design Online Testable Reversible Circuits. VDAT 2018: 322-334 - [c14]Mahabub Hasan Mahalat, Nikhil Ugale, Rohit Shahare, Bibhash Sen:
Design of Latch based Configurable Ring Oscillator PUF Targeting Secure FPGA. VLSI-SoC 2018: 261-266 - 2017
- [j11]Rajdeep Kumar Nath, Bibhash Sen, Biplab K. Sikdar:
Optimal synthesis of QCA logic circuit eliminating wire-crossings. IET Circuits Devices Syst. 11(3): 201-208 (2017) - [j10]Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya:
Novel conservative reversible error control circuits based on molecular QCA. Int. J. Comput. Appl. Technol. 56(1): 1-17 (2017) - [j9]Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya, Bandan Kumar Bhoi:
Testable Novel Parity-Preserving Reversible Gate and Low-Cost Quantum Decoder Design in 1D Molecular-QCA. J. Circuits Syst. Comput. 26(9): 1750145:1-1750145:26 (2017) - [j8]Pritam P. Chougule, Bibhash Sen, Tukaram D. Dongale:
Realization of processing In-memory computing architecture using Quantum Dot Cellular Automata. Microprocess. Microsystems 52: 49-58 (2017) - [j7]Mrinal Goswami, Bibhash Sen, Rijoy Mukherjee, Biplab K. Sikdar:
Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic. Microelectron. J. 60: 1-12 (2017) - [c13]Mrinal Goswami, Mohit Kumar, Bibhash Sen:
Cost effective realization of XOR logic in QCA. ISED 2017: 1-5 - [c12]Mrinal Goswami, Aron Narzary, Govind Raj, Bibhash Sen:
Design of reversible bidirectional logarithmic barrel shifter. ISED 2017: 1-4 - [i5]Mahabub Hasan Mahalat, Mrinal Goswami, Anindan Mondal, Bibhash Sen:
Synthesis and Optimization of Multi-Objective Multi-Output QCA Circuit using Genetic Algorithm. CoRR abs/1705.04099 (2017) - [i4]Mrinal Goswami, Mayukh Roy Chowdhury, Bibhash Sen:
Design of Configurable Sequential Circuits in Quantum-dot Cellular Automata. CoRR abs/1708.07616 (2017) - 2016
- [j6]Bibhash Sen, Yashraj Sahu, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar:
On the reliability of majority logic structure in quantum-dot cellular automata. Microelectron. J. 47: 7-18 (2016) - [c11]Mrinal Goswami, Bibhash Sen, Biplab K. Sikdar:
Design of low power 5-input majority voter in quantum-dot cellular automata with effective error resilience. ISED 2016: 101-105 - [c10]Subrata Chattopadhyay, Shiv Bhushan Tripathi, Mrinal Goswami, Bibhash Sen:
Design of fault tolerant majority voter for TMR circuit in QCA. VDAT 2016: 1-2 - [c9]Bibhash Sen, Rajdeep Kumar Nath, Rijoy Mukherjee, Yashraj Sahu, Biplab K. Sikdar:
Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect. VLSID 2016: 575-576 - [i3]Pritam P. Chougule, Bibhash Sen, Rijoy Mukherjee, Vijay C. Karade, P. S. Patil, Tukaram D. Dongale, Rajanish K. Kamat:
A Processing In-Memory Realization Using QCA: Proposal and Implementation. CoRR abs/1602.02249 (2016) - [i2]Pritam P. Chougule, Bibhash Sen, Tukaram D. Dongale:
Processing In-memory realization using Quantum Dot Cellular Automata. CoRR abs/1607.05065 (2016) - 2015
- [j5]Bibhash Sen, Mrinal Goswami, Subhra Mazumdar, Biplab K. Sikdar:
Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers. Comput. Electr. Eng. 45: 42-54 (2015) - [j4]Bibhash Sen, Anirban Nag, Asmit De, Biplab K. Sikdar:
Towards the hierarchical design of multilayer QCA logic circuit. J. Comput. Sci. 11: 233-244 (2015) - [c8]Rajdeep Kumar Nath, Bibhash Sen, Rachit Daga, Nilesh Chakraborty, Harsh Tibrewal, Biplab K. Sikdar:
Fault masking in Quantum-dot cellular automata using prohibitive logic circuit. VDAT 2015: 1-5 - [i1]Ram Sarkar, Bibhash Sen, Nibaran Das, Subhadip Basu:
Handwritten Devanagari Script Segmentation: A non-linear Fuzzy Approach. CoRR abs/1501.05472 (2015) - 2014
- [j3]Bibhash Sen, Manojit Dutta, Samik Some, Biplab K. Sikdar:
Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU. ACM J. Emerg. Technol. Comput. Syst. 11(3): 30:1-30:22 (2014) - [j2]Bibhash Sen, Manojit Dutta, Biplab K. Sikdar:
Efficient design of parity preserving logic in quantum-dot cellular automata targeting enhanced scalability in testing. Microelectron. J. 45(2): 239-248 (2014) - [j1]Bibhash Sen, Manojit Dutta, Mrinal Goswami, Biplab K. Sikdar:
Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability. Microelectron. J. 45(11): 1522-1532 (2014) - [c7]Bibhash Sen, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar:
Design of Fault Tolerant Universal Logic in QCA. ISED 2014: 166-170 - 2013
- [c6]Bibhash Sen, Mrinal Goswami, Samik Some, Biplab K. Sikdar:
Design of Sequential Circuits in Multilayer QCA Structure. ISED 2013: 21-25 - 2012
- [c5]Bibhash Sen, Manojit Dutta, Debajyoty Banik, Dipak K. Singh, Biplab K. Sikdar:
Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA. ISED 2012: 241-245 - [c4]Bibhash Sen, Manojit Dutta, Divyam Saran, Biplab K. Sikdar:
An Efficient Multiplexer in Quantum-dot Cellular Automata. VDAT 2012: 350-351 - 2011
- [c3]Bibhash Sen, Divyam Saran, Mousumi Saha, Biplab K. Sikdar:
Synthesis of Reversible Universal Logic around QCA with Online Testability. ISED 2011: 236-241 - 2010
- [c2]Bibhash Sen, Anik Sengupta, Mamata Dalui, Biplab K. Sikdar:
Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit. DSD 2010: 613-620 - [c1]Bibhash Sen, Mamata Dalui, Biplab K. Sikdar:
Introducing universal QCA logic gate for synthesizing symmetric functions with minimum wire-crossings. ICWET 2010: 828-833
Coauthor Index
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last updated on 2024-08-23 18:27 CEST by the dblp team
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