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2020 – today
- 2024
[c59]Christopher Batten
, Nathaniel Ross Pinckney, Mingjie Liu, Haoxing Ren, Brucek Khailany:
PyHDL-Eval: An LLM Evaluation Framework for Hardware Design Using Python-Embedded DSLs. MLCAD 2024: 10:1-10:17- [i19]Chia-Tung Ho, Haoxing Ren, Brucek Khailany:
VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool. CoRR abs/2408.08927 (2024) - [i18]Nathaniel Ross Pinckney, Christopher Batten, Mingjie Liu, Haoxing Ren, Brucek Khailany:
Revisiting VerilogEval: Newer LLMs, In-Context Learning, and Specification-to-RTL Tasks. CoRR abs/2408.11053 (2024) - 2023
- [j13]Haoxing Ren, Brucek Khailany, Matthew Fojtik, Yanqing Zhang:
Machine Learning and Algorithms: Let Us Team Up for EDA. IEEE Des. Test 40(1): 70-76 (2023) - [j12]Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany:
A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm. IEEE J. Solid State Circuits 58(4): 1129-1141 (2023) - [c58]Steve Dai, Hasan Genc, Rangharajan Venkatesan, Brucek Khailany:
Efficient Transformer Inference with Statically Structured Sparse Attention. DAC 2023: 1-6 - [c57]Rongjian Liang, Nathaniel Ross Pinckney, Yuji Chai, Haoxin Ren, Brucek Khailany:
Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation. DAC 2023: 1-2 - [c56]Dian-Lun Lin, Yanqing Zhang, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang:
GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. DAC 2023: 1-6 - [c55]Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren:
Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation. ICCAD 2023: 1-8 - [c54]Mingjie Liu, Haoyu Yang, Brucek Khailany, Haoxing Ren:
An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography Modeling. ICCAD 2023: 1-9 - [c53]Chia-Tung Ho, Alvin Ho, Matthew Fojtik, Minsoo Kim, Shang Wei, Yaguang Li, Brucek Khailany, Haoxing Ren:
NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model. ISPD 2023: 44-52 - [c52]Anthony Agnesina, Puranjay Rajvanshi, Tian Yang, Geraldo Pradipta, Austin Jiao, Ben Keller, Brucek Khailany, Haoxing Ren:
AutoDMP: Automated DREAMPlace-based Macro Placement. ISPD 2023: 149-157 - [i17]Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren:
VerilogEval: Evaluating Large Language Models for Verilog Code Generation. CoRR abs/2309.07544 (2023) - [i16]Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Ross Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Brucek Khailany, Kishor Kunal, Xiaowei Li, Hao Liu, Stuart F. Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P. Suthar, Varun Tej, Kaizhe Xu, Haoxing Ren:
ChipNeMo: Domain-Adapted LLMs for Chip Design. CoRR abs/2311.00176 (2023) - 2022
- [j11]Jiawei Zhao, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, Mustafa Fayez Ali, Ming-Yu Liu, Brucek Khailany, William J. Dally, Anima Anandkumar:
LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update. IEEE Trans. Computers 71(12): 3179-3190 (2022) - [c51]Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren:
Generic lithography modeling with dual-band optics-inspired neural networks. DAC 2022: 973-978 - [c50]Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany:
GATSPI: GPU accelerated gate-level simulation for power improvement. DAC 2022: 1231-1236 - [c49]Siddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren:
Generative self-supervised learning for gate sizing: invited. DAC 2022: 1331-1334 - [c48]Siddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren:
TransSizer: A Novel Transformer-Based Fast Gate Sizer. ICCAD 2022: 74:1-74:9 - [c47]Charbel Sakr, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, William J. Dally, Brucek Khailany:
Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training. ICML 2022: 19123-19138 - [c46]Dian-Lun Lin, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Tsung-Wei Huang:
From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus. ICPP 2022: 88:1-88:12 - [c45]Hao Chen, Walker J. Turner, Sanquan Song, Keren Zhu, George F. Kokai, Brian Zimmer, C. Thomas Gray, Brucek Khailany, David Z. Pan, Haoxing Ren:
AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies. ISPD 2022: 175-183 - [c44]Vidya A. Chhabria, Ben Keller, Yanqing Zhang, Sandeep Vollala, Sreedhar Pratty, Haoxing Ren, Brucek Khailany:
XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning. MLCAD 2022: 63-69 - [c43]Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, William J. Dally, C. Thomas Gray, Brucek Khailany:
A 17-95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm. VLSI Technology and Circuits 2022: 16-17 - [i15]Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany:
GATSPI: GPU Accelerated Gate-Level Simulation for Power Improvement. CoRR abs/2203.06117 (2022) - [i14]Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren:
Generic Lithography Modeling with Dual-band Optics-Inspired Neural Networks. CoRR abs/2203.08616 (2022) - [i13]Charbel Sakr, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, William J. Dally, Brucek Khailany:
Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training. CoRR abs/2206.06501 (2022) - [i12]Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren:
Large Scale Mask Optimization Via Convolutional Fourier Neural Operator and Litho-Guided Self Training. CoRR abs/2207.04056 (2022) - [i11]Mingjie Liu, Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Selim Dogru, Anima Anandkumar, David Z. Pan, Brucek Khailany, Haoxing Ren:
An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design. CoRR abs/2210.15765 (2022) - [i10]Jiaqi Gu, Ben Keller, Jean Kossaifi, Anima Anandkumar, Brucek Khailany, David Z. Pan:
HEAT: Hardware-Efficient Automatic Tensor Decomposition for Transformer Compression. CoRR abs/2211.16749 (2022) - 2021
- [j10]Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler:
Simba: scaling deep-learning inference with chiplet-based architecture. Commun. ACM 64(6): 107-116 (2021) - [j9]Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, David Z. Pan:
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(4): 748-761 (2021) - [c42]Jacob R. Stevens, Rangharajan Venkatesan, Steve Dai, Brucek Khailany, Anand Raghunathan:
Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers. DAC 2021: 469-474 - [c41]Mingjie Liu, Walker J. Turner, George F. Kokai, Brucek Khailany, David Z. Pan, Haoxing Ren:
Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization. DATE 2021: 1372-1377 - [c40]Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar:
MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification. DATE 2021: 1825-1828 - [c39]Ghasem Pasandi, Sreedhar Pratty, David Brown, Yanqing Zhang, Haoxing Ren, Brucek Khailany:
2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting. ICCAD 2021: 1-6 - [c38]Nathaniel Ross Pinckney, Rangharajan Venkatesan, Ben Keller, Brucek Khailany:
IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs. ICCAD 2021: 1-9 - [c37]Haoxing Ren, Saad Godil, Brucek Khailany, Robert Kirby, Haiguang Liao, Siddhartha Nath, Jonathan Raiman, Rajarshi Roy:
Optimizing VLSI Implementation with Reinforcement Learning - ICCAD Special Session Paper. ICCAD 2021: 1-6 - [c36]Jack Choquette, Ming-Ju Edward Lee, Ronny Krashinsky, Vishnu Balan, Brucek Khailany:
3.2 The A100 Datacenter GPU and Ampere Architecture. ISSCC 2021: 48-50 - [c35]Steve Dai, Rangharajan Venkatesan, Mark Ren, Brian Zimmer, William J. Dally, Brucek Khailany:
VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference. MLSys 2021 - [i9]Steve Dai, Rangharajan Venkatesan, Haoxing Ren, Brian Zimmer, William J. Dally, Brucek Khailany:
VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference. CoRR abs/2102.04503 (2021) - [i8]Steve Dai, Alicia Klinefelter, Haoxing Ren, Rangharajan Venkatesan, Ben Keller, Nathaniel Ross Pinckney, Brucek Khailany:
Verifying High-Level Latency-Insensitive Designs with Formal Model Checking. CoRR abs/2102.06326 (2021) - [i7]Jacob R. Stevens, Rangharajan Venkatesan, Steve Dai, Brucek Khailany, Anand Raghunathan:
Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers. CoRR abs/2103.09301 (2021) - [i6]Jiawei Zhao, Steve Dai, Rangharajan Venkatesan, Ming-Yu Liu, Brucek Khailany, Bill Dally, Anima Anandkumar:
Low-Precision Training in Logarithmic Number System using Multiplicative Weight Update. CoRR abs/2106.13914 (2021) - [i5]Haoxing Ren, Matthew Fojtik, Brucek Khailany:
NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. CoRR abs/2107.07044 (2021) - 2020
- [j8]Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany:
A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. IEEE J. Solid State Circuits 55(4): 920-932 (2020) - [j7]Brucek Khailany, Haoxing Ren, Steve Dai, Saad Godil, Ben Keller, Robert Kirby, Alicia Klinefelter, Rangharajan Venkatesan, Yanqing Zhang, Bryan Catanzaro, William J. Dally:
Accelerating Chip Design With Machine Learning. IEEE Micro 40(6): 23-32 (2020) - [j6]Yibo Lin, Wuxi Li, Jiaqi Gu, Haoxing Ren, Brucek Khailany, David Z. Pan:
ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5083-5096 (2020) - [c34]Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen:
PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network. ASP-DAC 2020: 13-18 - [c33]Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza:
FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. ASP-DAC 2020: 19-25 - [c32]Yanqing Zhang, Haoxing Ren, Brucek Khailany:
GRANNITE: Graph Neural Network Inference for Transferable Power Estimation. DAC 2020: 1-6 - [c31]Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany:
Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk). ICCAD 2020: 70:1-70:4 - [c30]Yanqing Zhang, Haoxing Ren, Brucek Khailany:
Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk). ICCAD 2020: 166:1-166:5 - [c29]Brucek Khailany:
Accelerating Chip Design with Machine Learning. MLCAD 2020: 33 - [i4]Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza:
FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. CoRR abs/2011.13493 (2020) - [i3]Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen:
PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network. CoRR abs/2011.13494 (2020) - [i2]Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar:
MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification. CoRR abs/2012.10597 (2020)
2010 – 2019
- 2019
- [c28]Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Stephen G. Tell, Brian Zimmer, Tezaswi Raja, Kevin Zhou, William J. Dally, Brucek Khailany:
A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET. ASYNC 2019: 27-35 - [c27]Yuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan, Bei Yu:
High Performance Graph Convolutional Networks with Applications in Testability Analysis. DAC 2019: 18 - [c26]Yuan Zhou, Haoxing Ren, Yanqing Zhang, Ben Keller, Brucek Khailany, Zhiru Zhang:
PRIMAL: Power Inference using Machine Learning. DAC 2019: 39 - [c25]Angad S. Rekhi, Brian Zimmer, Nikola Nedovic, Ningxi Liu, Rangharajan Venkatesan, Miaorong Wang, Brucek Khailany, William J. Dally, C. Thomas Gray:
Analog/Mixed-Signal Hardware Error Modeling for Deep Learning Inference. DAC 2019: 81 - [c24]Yibo Lin, Shounak Dhar, Wuxi Li, Haoxing Ren, Brucek Khailany, David Z. Pan:
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. DAC 2019: 117 - [c23]Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany:
A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology. Hot Chips Symposium 2019: 1-24 - [c22]Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany:
MAGNet: A Modular Accelerator Generator for Neural Networks. ICCAD 2019: 1-8 - [c21]Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer:
Timeloop: A Systematic Approach to DNN Accelerator Evaluation. ISPASS 2019: 304-315 - [c20]Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler:
Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. MICRO 2019: 14-27 - [c19]Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany:
A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm. VLSI Circuits 2019: 300- - 2018
- [c18]Brucek Khailany, Evgeni Khmer, Rangharajan Venkatesan, Jason Clemons, Joel S. Emer, Matthew Fojtik, Alicia Klinefelter, Michael Pellauer, Nathaniel Ross Pinckney, Yakun Sophia Shao, Shreesha Srinath, Christopher Torng, Sam Likun Xi, Yanqing Zhang, Brian Zimmer:
A modular digital VLSI flow for high-productivity SoC design. DAC 2018: 72:1-72:6 - [c17]William J. Dally, C. Thomas Gray, John Poulton, Brucek Khailany, John M. Wilson, Larry R. Dennison:
Hardware-Enabled Artificial Intelligence. VLSI Circuits 2018: 3-6 - 2017
- [c16]Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally:
SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. ISCA 2017: 27-40 - [i1]Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally:
SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. CoRR abs/1708.04485 (2017) - 2016
- [c15]Divya Akella Kamakshi, Matthew Fojtik, Brucek Khailany, Sudhir S. Kudva, Yaping Zhou, Benton H. Calhoun:
Modeling and Analysis of Power Supply Noise Tolerance with Fine-Grained GALS Adaptive Clocks. ASYNC 2016: 75-82 - [c14]Injoon Hong, Jason Clemons, Rangharajan Venkatesan, Iuri Frosio, Brucek Khailany, Stephen W. Keckler:
A real-time energy-efficient superpixel hardware accelerator for mobile computer vision applications. DAC 2016: 95:1-95:6 - 2015
- [c13]Ben Keller, Matthew Fojtik, Brucek Khailany:
A Pausible Bisynchronous FIFO for GALS Systems. ASYNC 2015: 1-8 - 2013
- [c12]Brucek Khailany:
GPU design in a power-limited era. MSE 2013: 68 - 2012
- [c11]Mark Gebhart, Stephen W. Keckler, Brucek Khailany, Ronny Krashinsky, William J. Dally:
Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor. MICRO 2012: 96-106 - 2011
- [j5]Stephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco:
GPUs and the Future of Parallel Computing. IEEE Micro 31(5): 7-17 (2011) - [c10]Michael Bauer, Henry Cook, Brucek Khailany:
CudaDMA: optimizing GPU memory bandwidth via warp specialization. SC 2011: 12:1-12:11
2000 – 2009
- 2008
- [j4]Brucek Khailany, Ted Williams, Jim Lin, Eileen Peters Long, Mark Rygh, DeForest Tovey, William J. Dally:
A Programmable 512 GOPS Stream Processor for Signal, Image, and Video Processing. IEEE J. Solid State Circuits 43(1): 202-213 (2008) - 2007
- [c9]Brucek Khailany, Ted Williams, Jim Lin, Eileen Long, Mark Rygh, DeForest Tovey, William J. Dally:
A Programmable 512 GOPS Stream Processor for Signal, Image, and Video Processing. ISSCC 2007: 272-602 - 2004
- [j3]William J. Dally, Ujval J. Kapasi, Brucek Khailany, Jung Ho Ahn, Abhishek Das:
Stream Processors: Progammability and Efficiency. ACM Queue 2(1): 52-62 (2004) - [c8]Jung Ho Ahn, William J. Dally, Brucek Khailany, Ujval J. Kapasi, Abhishek Das:
Evaluating the Imagine Stream Architecture. ISCA 2004: 14-25 - 2003
- [j2]Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter R. Mattson, John D. Owens:
Programmable Stream Processors. Computer 36(8): 54-62 (2003) - [c7]Brucek Khailany, William J. Dally, Scott Rixner, Ujval J. Kapasi, John D. Owens, Brian Towles:
Exploring the VLSI Scalability of Stream Processors. HPCA 2003: 153-164 - 2002
- [c6]John D. Owens, Brucek Khailany, Brian Towles, William J. Dally:
Comparing Reyes and OpenGL on a Stream Architecture. Graphics Hardware 2002: 47-56 - [c5]Ujval J. Kapasi, William J. Dally, Scott Rixner, John D. Owens, Brucek Khailany:
The Imagine Stream Processor. ICCD 2002: 282-288 - [c4]Brucek Khailany, William J. Dally, Andrew Chang, Ujval J. Kapasi, Jinyung Namkoong, Brian Towles:
VLSI Design and Verification of the Imagine Processor. ICCD 2002: 289-294 - 2001
- [j1]Brucek Khailany, William J. Dally, Ujval J. Kapasi, Peter R. Mattson, Jinyung Namkoong, John D. Owens, Brian Towles, Andrew Chang, Scott Rixner:
Imagine: Media Processing with Streams. IEEE Micro 21(2): 35-46 (2001) - 2000
- [c3]Scott Rixner, William J. Dally, Brucek Khailany, Peter R. Mattson, Ujval J. Kapasi, John D. Owens:
Register Organization for Media Processing. HPCA 2000: 375-386 - [c2]Ujval J. Kapasi, William J. Dally, Scott Rixner, Peter R. Mattson, John D. Owens, Brucek Khailany:
Efficient conditional operations for data-parallel architectures. MICRO 2000: 159-170
1990 – 1999
- 1998
- [c1]Scott Rixner, William J. Dally, Ujval J. Kapasi, Brucek Khailany, Abelardo López-Lagunas, Peter R. Mattson, John D. Owens:
A Bandwidth-efficient Architecture for Media Processing. MICRO 1998: 3-13
Coauthor Index
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