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ORCIDLisa R. Hsu
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2010 – 2019
- 2014
[c5]Yi Yang, Ping Xiang, Michael Mantor, Norman Rubin, Lisa R. Hsu, Qunfeng Dong, Huiyang Zhou
:
A Case for a Flexible Scalar Unit in SIMT Architecture. IPDPS 2014: 93-102- 2013
- [c4]Ping Xiang, Yi Yang, Mike Mantor, Norm Rubin, Lisa R. Hsu, Huiyang Zhou:
Exploiting uniform vector instructions for GPGPU performance, energy efficiency, and opportunistic reliability enhancement. ICS 2013: 433-442
2000 – 2009
- 2009
- [b1]Lisa R. Hsu:
Cache Resource Allocation in Large-Scale Chip Multiprocessors. University of Michigan, USA, 2009 - 2007
- [c3]Ravi R. Iyer, Li Zhao, Fei Guo, Ramesh Illikkal, Srihari Makineni, Donald Newell, Yan Solihin, Lisa R. Hsu, Steven K. Reinhardt:
QoS policies and architecture for cache/memory in CMP platforms. SIGMETRICS 2007: 25-36 - 2006
- [j2]Nathan L. Binkert, Ronald G. Dreslinski, Lisa R. Hsu, Kevin T. Lim, Ali G. Saidi, Steven K. Reinhardt:
The M5 Simulator: Modeling Networked Systems. IEEE Micro 26(4): 52-60 (2006) - [c2]Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. Iyer, Srihari Makineni:
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource. PACT 2006: 13-22 - 2005
- [j1]Lisa R. Hsu, Ravishankar R. Iyer, Srihari Makineni, Steven K. Reinhardt, Donald Newell:
Exploring the cache design space for large scale CMPs. SIGARCH Comput. Archit. News 33(4): 24-33 (2005) - [c1]Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Ronald G. Dreslinski, Andrew L. Schultz, Steven K. Reinhardt:
Performance Analysis of System Overheads in TCP/IP Workloads. IEEE PACT 2005: 218-230
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