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2020 – today
- 2024
[j65]Dong Xiang
, Zi-Qiang Zhu, Dawei Liang:
Investigation of Additional Radial Air Gaps on Cogging Torque in Modular Permanent Magnet Machines Based on Taguchi Method. IEEE Access 12: 109967-109983 (2024)- [j64]Guiping Chen, Dong Xiang, Tingting Liu, Feng Xu, Wangsen Li:
Deep conditional adversarial subdomain adaptation network for unsupervised mechanical fault diagnosis. Knowl. Based Syst. 300: 112180 (2024) - [j63]Hongyang Wang, Ting Wang, Dong Xiang, Wenjie Yang, Jia Li:
Low-parameter GAN inversion framework based on hypernetwork. Multim. Syst. 30(4): 181 (2024) - [j62]Dong Xiang, Sizhuo Chen, Mengna Liu, Fan Shi, Xu Cheng:
Multilevel Signal Decomposition Layer-Specific Residual Network for Blade Icing Prediction. IEEE Signal Process. Lett. 31: 2160-2164 (2024) - [j61]Dong Xiang:
Test Compression for Launch-on-Capture Transition Fault Testing. ACM Trans. Design Autom. Electr. Syst. 29(1): 7:1-7:20 (2024) - [c86]Dong Xiang, Xu Cheng, Sizhuo Chen, Mengna Liu, Fan Shi, Xiufeng Liu:
Multiscale Wavelet-Driven Transformerfor Blade Icing Detection. FAIML 2024: 204-210 - [c85]Min Jin, Can Xiang, Dong Xiang:
A Fast Method for Constructing Phase Shifters to Reduce Wiring Conflicts. ITC-Asia 2024: 1-6 - [c84]Yinxiao Feng, Yuchen Wei, Dong Xiang, Kaisheng Ma:
Evaluating Chiplet-based Large-Scale Interconnection Networks via Cycle-Accurate Packet-Parallel Simulation. USENIX ATC 2024: 731-747 - [i2]Mengna Liu, Dong Xiang, Xu Cheng, Xiufeng Liu, Dalin Zhang, Shengyong Chen, Christian S. Jensen:
Disentangling Imperfect: A Wavelet-Infused Multilevel Heterogeneous Network for Human Activity Recognition in Flawed Wearable Sensor Data. CoRR abs/2402.09434 (2024) - [i1]Li Tao, Dong Xiang, Junfeng Hao, Yin Ping, Xu Xiaoxue, Maokai Lai, Li Yuan, Ting Peng:
Holistic view of the road transportation system based on real-time data sharing mechanism. CoRR abs/2407.03187 (2024) - 2023
- [j60]Shuren Guo, Xuanpu Dong, Dong Xiang, Huatang Cao:
A Pose-Normalization Method for Casting Voxel Models Using Second-Order Central Moment Matrix. IEEE Access 11: 36849-36855 (2023) - [j59]Rong Ding, Haiming Jin, Dong Xiang, Xiaocheng Wang, Yongkui Zhang, Dingman Shen, Lu Su, Wentian Hao, Mingyuan Tao, Xinbing Wang, Chenghu Zhou:
Soil Moisture Sensing with UAV-Mounted IR-UWB Radar and Deep Learning. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 7(1): 11:1-11:25 (2023) - [c83]Yinxiao Feng, Dong Xiang, Kaisheng Ma:
A Scalable Methodology for Designing Efficient Interconnection Network of Chiplets. HPCA 2023: 1059-1071 - [c82]Yecheng Liu, Xu Chen, Yongxin Xu, Dong Xiang, Linjian Mo:
Accelerating Model Solving for Integrated Optimization of Timetabling and Vehicle Scheduling based on Graph Convolutional Network. ITSC 2023: 880-886 - [c81]Yinxiao Feng, Dong Xiang, Kaisheng Ma:
Heterogeneous Die-to-Die Interfaces: Enabling More Flexible Chiplet Interconnection Systems. MICRO 2023: 930-943 - 2022
- [j58]Zhiqiang Xu, Dong Xiang, Jialiang He:
Data Privacy Protection in News Crowdfunding in the Era of Artificial Intelligence. J. Glob. Inf. Manag. 30(7): 1-17 (2022) - [c80]Longzhou Ma, Xiuli Wu, Yuan Kuang, Ying Tang, Dong Xiang:
Knowledge graph-based approach to trace the full life cycle information of decommissioned electromechanical products. CASE 2022: 2028-2033 - [c79]Dong Xiang:
High-Radix Interconnection Networks. ICS 2022: 3-9 - 2021
- [j57]Dong Xiang, Yuming Zhang, Andrew C. Worthington:
Determinants of the Use of Fintech Finance Among Chinese Small and Medium-Sized Enterprises. IEEE Trans. Engineering Management 68(6): 1590-1604 (2021) - [c78]Dong Xiang, Yunzhou Ju:
All-to-All Broadcast in Dragonfly Networks. COCOON 2021: 13-24 - 2020
- [j56]Yuan Cai, Dong Xiang, Xiang Ji:
Deadlock-free adaptive 3D network-on-chips routing algorithm with repetitive turn concept. IET Commun. 14(11): 1784-1793 (2020) - [j55]Mujiangshan Wang, Dong Xiang, Shiying Wang:
Connectivity and Diagnosability of Leaf-Sort Graphs. Parallel Process. Lett. 30(3): 2040004:1-2040004:13 (2020) - [c77]Dong Xiang, Jiaming Cai, Bo Liu:
Low-Power Weighted Pseudo-Random Test Pattern Generation for Launch-on-Capture Delay Testing. VTS 2020: 1-6
2010 – 2019
- 2019
- [j54]Dong Xiang, Qunyang Pan:
Low-power and high-performance adaptive routing in on-chip networks. CCF Trans. High Perform. Comput. 1(2): 92-110 (2019) - [j53]Xiaoxing He, Xianghong Hua, Jean-Philippe Montillet, Kegen Yu, Jingui Zou, Dong Xiang, Huiping Zhu, Di Zhang, Zhengkai Huang, Bufan Zhao:
An Innovative Virtual Simulation Teaching Platform on Digital Mapping with Unmanned Aerial Vehicle for Remote Sensing Education. Remote. Sens. 11(24): 2993 (2019) - [j52]Dong Xiang, Bing Li, Yi Fu:
Fault-Tolerant Adaptive Routing in Dragonfly Networks. IEEE Trans. Dependable Secur. Comput. 16(2): 259-271 (2019) - [c76]Dong Xiang, Xia Ran, Zhiqiang Xu:
Construction of Ultimate Video Experience and Application Innovation System Based on 5G and 8K. DPTA 2019: 35-41 - [c75]Dong Xiang, Yuehua Wang, Yingting Wang, Tianyi Bu, Guangjun Chen, Minhong Wu:
Simulation Analysis on the Rupture Trend of Intracranial Hemangioma. ICPCSEE (2) 2019: 488-498 - [c74]Cheng Tan, Ze Jin, Chuanxiong Guo, Tianrong Zhang, Haitao Wu, Karl Deng, Dongming Bi, Dong Xiang:
NetBouncer: Active Device and Link Failure Localization in Data Center Networks. NSDI 2019: 599-614 - 2018
- [j51]Dong Xiang, Krishnendu Chakrabarty, Hideo Fujiwara:
Fault-Tolerant Unicast-Based Multicast for Reliable Network-on-Chip Testing. ACM Trans. Design Autom. Electr. Syst. 23(6): 73:1-73:23 (2018) - [c73]Yuan Cai, Wei Luo, Dong Xiang:
The Column-Partition and Row-Partition Turn Model. COMPSAC (1) 2018: 687-694 - [c72]Yuan Cai, Dong Xiang, Xiang Ji:
Deadlock-Free Adaptive Routing Based on the Repetitive Turn Model for 3D Network-on-Chip. ISPA/IUCC/BDCloud/SocialCom/SustainCom 2018: 722-728 - 2017
- [j50]Dong Xiang, Xiaoqing Wen, Laung-Terng Wang:
Low-Power Scan-Based Built-In Self-Test Based on Weighted Pseudorandom Test Pattern Generation and Reseeding. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 942-953 (2017) - 2016
- [j49]Qiu-Shun Li, Xu-Lin Zhang, Jian-Guo Shi, Dong Xiang, Lan Zheng, Yan Yang, Jun-Hui Yang, Dong Feng, Wen-Fei Dong:
An Ultrasensitive Long-Period Fiber Grating-Based Refractive Index Sensor with Long Wavelengths. Sensors 16(12): 2205 (2016) - [j48]Dong Xiang, Krishnendu Chakrabarty, Hideo Fujiwara:
Multicast-Based Testing and Thermal-Aware Test Scheduling for 3D ICs with a Stacked Network-on-Chip. IEEE Trans. Computers 65(9): 2767-2779 (2016) - [j47]Dong Xiang, Kele Shen, Bhargab B. Bhattacharya, Xiaoqing Wen, Xijiang Lin:
Thermal-Aware Small-Delay Defect Testing in Integrated Circuits for Mitigating Overkill. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(3): 499-512 (2016) - [j46]Dong Xiang, Kele Shen:
A New Unicast-Based Multicast Scheme for Network-on-Chip Router and Interconnect Testing. ACM Trans. Design Autom. Electr. Syst. 21(2): 24:1-24:23 (2016) - [j45]Dong Xiang, Xiaowei Liu:
Deadlock-Free Broadcast Routing in Dragonfly Networks without Virtual Channels. IEEE Trans. Parallel Distributed Syst. 27(9): 2520-2532 (2016) - [c71]Dong Xiang, Krishnendu Chakrabarty, Hideo Fujiwara:
A unified test and fault-tolerant multicast solution for network-on-chip designs. ITC 2016: 1-9 - 2015
- [j44]Dong Xiang, Siyu Yang, Zihao Mai, Yu Qian:
Comparative study of coal, natural gas, and coke-oven gas based methanol to olefins processes in China. Comput. Chem. Eng. 83: 176-185 (2015) - [j43]Zhigang Yu, Dong Xiang, Xinyu Wang:
Balancing virtual channel utilization for deadlock-free routing in torus networks. J. Supercomput. 71(8): 3094-3115 (2015) - [c70]Zhou Jiang, Dong Xiang, Kele Shen:
A Novel Scan Segmentation Design for Power Controllability and Reduction in At-Speed Test. ATS 2015: 7-12 - [c69]Chuanxiong Guo, Lihua Yuan, Dong Xiang, Yingnong Dang, Ray Huang, David A. Maltz, Zhaoyi Liu, Vin Wang, Bin Pang, Hua Chen, Zhi-Wei Lin, Varugis Kurien:
Pingmesh: A Large-Scale System for Data Center Network Latency Measurement and Analysis. SIGCOMM 2015: 139-152 - [c68]Zhou Jiang, Dong Xiang, Kele Shen:
A scan segmentation architecture for power controllability and reduction. SoCC 2015: 269-274 - [e1]Guojun Wang, Tatsuhiro Tsuchiya, Dong Xiang:
21st IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2015, Zhangjiajie, China, November 18-20, 2015. IEEE Computer Society 2015, ISBN 978-1-4673-9376-8 [contents] - 2014
- [j42]Hui Wang, Yiming Kevin Rong, Dong Xiang:
Mechanical assembly planning using ant colony optimization. Comput. Aided Des. 47: 59-71 (2014) - [j41]Kele Shen, Dong Xiang, Zhou Jiang:
Reconfigured test architecture optimization for TSV-based three-dimensional SoCs. IEICE Electron. Express 11(16): 20140661 (2014) - [j40]Dong Xiang, Kele Shen:
A thermal-driven test application scheme for pre-bond and post-bond scan testing of three-dimensional ICs. ACM J. Emerg. Technol. Comput. Syst. 10(2): 18:1-18:19 (2014) - [j39]Dong Xiang, Wenjie Sui, Boxue Yin, Kwang-Ting Cheng:
Compact Test Generation With an Influence Input Measure for Launch-On-Capture Transition Fault Testing. IEEE Trans. Very Large Scale Integr. Syst. 22(9): 1968-1979 (2014) - [c67]Kele Shen, Dong Xiang, Zhou Jiang:
Dual-Speed TAM Optimization of 3D SoCs for Mid-bond and Post-bond Testing. ATS 2014: 7-12 - [c66]Xiaoyan Guo, Yu Cao, Baoyao Zhou, Dong Xiang, Liyuan Zhao:
Cloud-Scale Transaction Processing with ParaDB System: A Demonstration. DASFAA (2) 2014: 535-538 - [c65]Kele Shen, Dong Xiang, Zhou Jiang:
Cost-Effective Test Optimized Scheme of TSV-Based 3D SoCs for Pre-Bond Test. ISVLSI 2014: 208-213 - [c64]Miguel Gorgues, Dong Xiang, José Flich, Zhigang Yu, José Duato:
Achieving balanced buffer utilization with a proper co-design of flow control and routing algorithm. NOCS 2014: 25-32 - 2013
- [j38]Xinyu Wang, Dong Xiang, Zhigang Yu:
TM: a new and simple topology for interconnection networks. J. Supercomput. 66(1): 514-538 (2013) - [j37]Dong Xiang, Jianbo Li, Krishnendu Chakrabarty, Xijiang Lin:
Test compaction for small-delay defects using an effective path selection scheme. ACM Trans. Design Autom. Electr. Syst. 18(3): 44:1-44:23 (2013) - [c63]Zhengxing Huang, Guan Gui, An-min Huang, Dong Xiang, Fumiyuki Adachi:
Regularization selection method for LMS-type sparse multipath channel estimation. APCC 2013: 649-654 - [c62]Dong Xiang:
A Cost-Effective Scheme for Network-on-Chip Router and Interconnect Testing. Asian Test Symposium 2013: 207-212 - [c61]Zhigang Yu, Dong Xiang, Xinyu Wang:
VCBR: Virtual Channel Balanced Routing in Torus Networks. HPCC/EUC 2013: 1359-1365 - [c60]Dong Xiang, Yan Zhang, Shuchang Shan, Yi Xu:
A Fault-Tolerant Routing Algorithm Design for On-Chip Optical Networks. SRDS 2013: 1-9 - [c59]Dong Xiang, Zhigang Yu, Jie Wu:
Deadlock-Free Fully Adaptive Routing in Irregular Networks without Virtual Channels. TrustCom/ISPA/IUCC 2013: 983-990 - [c58]Dong Xiang, Gang Liu, Krishnendu Chakrabarty, Hideo Fujiwara:
Thermal-aware test scheduling for NOC-based 3D integrated circuits. VLSI-SoC 2013: 96-101 - 2012
- [j36]Dong Xiang, Zhen Chen, Laung-Terng Wang:
Scan Flip-Flop Grouping to Compress Test Data and Compact Test Responses for Launch-on-Capture Delay Testing. ACM Trans. Design Autom. Electr. Syst. 17(2): 18:1-18:24 (2012) - [j35]Dong Xiang, Wei Luo:
An Efficient Adaptive Deadlock-Free Routing Algorithm for Torus Networks. IEEE Trans. Parallel Distributed Syst. 23(5): 800-808 (2012) - [c57]Dong Xiang, Kele Shen, Yangdong Deng:
A Thermal-Driven Test Application Scheme for 3-Dimensional ICs. Asian Test Symposium 2012: 101-106 - [c56]Jianbo Li, Yu Huang, Wu-Tung Cheng, Chris Schuermyer, Dong Xiang, Eric Faehn, Ruth Farrugia:
A Hybrid Flow for Memory Failure Bitmap Classification. Asian Test Symposium 2012: 314-319 - [c55]Dong Xiang, Jiangxue Han:
Multiple Spanning Tree Construction for Deadlock-Free Adaptive Routing in Irregular Networks. ISPA 2012: 9-16 - 2011
- [j34]Dong Xiang, Ye Zhang:
Cost-Effective Power-Aware Core Testing in NoCs Based on a New Unicast-Based Multicast Scheme. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(1): 135-147 (2011) - [j33]Zhen Chen, Krishnendu Chakrabarty, Dong Xiang:
MVP: Minimum-Violations Partitioning for Reducing Capture Power in At-Speed Delay-Fault Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(11): 1762-1767 (2011) - [j32]Dong Xiang:
Deadlock-Free Adaptive Routing in Meshes with Fault-Tolerance Ability Based on Channel Overlapping. IEEE Trans. Dependable Secur. Comput. 8(1): 74-88 (2011) - [c54]Jia Li, Qiang Xu, Dong Xiang:
Compression-aware capture power reduction for at-speed testing. ASP-DAC 2011: 806-811 - [c53]Dong Xiang, Zhen Chen:
Selective Test Response Collection for Low-Power Scan Testing with Well-Compressed Test Data. Asian Test Symposium 2011: 40-45 - [c52]Zhen Chen, Jia Li, Dong Xiang, Yu Huang:
Virtual Circuit Model for Low Power Scan Testing in Linear Decompressor-Based Compression Environment. Asian Test Symposium 2011: 96-101 - [c51]Zhen Chen, Sharad C. Seth, Dong Xiang, Bhargab B. Bhattacharya:
Diagnosis of Multiple Scan-Chain Faults in the Presence of System Logic Defects. Asian Test Symposium 2011: 297-302 - [c50]Jia Li, Yu Huang, Dong Xiang:
Prediction of compression bound and optimization of compression architecture for linear decompression-based schemes. VTS 2011: 297-302 - 2010
- [j31]Zhen Chen, J. Feng, Dong Xiang, Boxue Yin:
Scan chain configuration based X-filling for low power and high quality testing. IET Comput. Digit. Tech. 4(1): 1-13 (2010) - [j30]Zhen Chen, Sharad C. Seth, Dong Xiang, Bhargab B. Bhattacharya:
PVT: Unified Reduction of Test Power, Volume, and Test Time Using Double-Tree Scan Architecture. J. Low Power Electron. 6(3): 457-468 (2010) - [j29]Chengxiang Wang, Longwei Yin, Luyuan Zhang, Dong Xiang, Rui Gao:
Metal Oxide Gas Sensors: Sensitivity and Influencing Factors. Sensors 10(3): 2088-2106 (2010) - [j28]Zhen Chen, Dong Xiang:
A Novel Test Application Scheme for High Transition Fault Coverage and Low Test Cost. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(6): 966-976 (2010) - [c49]Zhen Chen, Krishnendu Chakrabarty, Dong Xiang:
MVP: Capture-power reduction with minimum-violations partitioning for delay testing. ICCAD 2010: 149-154 - [c48]Jia Li, Dong Xiang:
DfT optimization for pre-bond testing of 3D-SICs containing TSVs. ICCD 2010: 474-479 - [c47]Xinyu Wang, Dong Xiang:
Multi-mapping Meshes: A New Communicating Fabric for Networks-on-Chip. ICPADS 2010: 438-445 - [c46]YanBin Lin, Dong Xiang:
An Effective Congestion-Aware Selection Function for Adaptive Routing in Interconnection Networks. PDCAT 2010: 156-165 - [c45]Zhen Chen, Sharad C. Seth, Dong Xiang, Bhargab B. Bhattacharya:
A Unified Solution to Scan Test Volume, Time, and Power Minimization. VLSI Design 2010: 9-14 - [c44]Zhen Chen, Dong Xiang:
Low-capture-power at-speed testing using partial launch-on-capture test scheme. VTS 2010: 141-146 - [c43]Zhen Chen, Sharad C. Seth, Dong Xiang:
A novel hybrid delay testing scheme with low test power, volume, and time. VTS 2010: 307-312
2000 – 2009
- 2009
- [j27]Dong Xiang, Yueli Zhang, Yi Pan:
Practical Deadlock-Free Fault-Tolerant Routing in Meshes Based on the Planar Network Fault Model. IEEE Trans. Computers 58(5): 620-633 (2009) - [j26]Dong Xiang, Dianwei Hu, Qiang Xu, Alex Orailoglu:
Low-Power Scan Testing for Test Data Compression Using a Routing-Driven Scan Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(7): 1101-1105 (2009) - [c42]Zhen Chen, Boxue Yin, Dong Xiang:
Conflict driven scan chain configuration for high transition fault coverage and low test power. ASP-DAC 2009: 666-671 - [c41]Dong Xiang, Boxue Yin, Krishnendu Chakrabarty:
Compact Test Generation for Small-Delay Defects Using Testable-Path Information. Asian Test Symposium 2009: 424-429 - [c40]Zhen Chen, Dong Xiang, Boxue Yin:
A power-effective scan architecture using scan flip-flops clustering and post-generation filling. ACM Great Lakes Symposium on VLSI 2009: 517-522 - [c39]Wei Jiang, Dechao Liu, Xing Xie, Matthew R. Scott, Jonathan Tien, Dong Xiang:
An online advertisement platform based on image content bidding. ICME 2009: 1234-1237 - [c38]Matthew R. Scott, Wei Jiang, Xing Xie, Jonathan Tien, Gang Chen, Dong Xiang:
Visiads: A vision-based advertising platform for camera phones. ICME 2009: 1837-1838 - [c37]Boxue Yin, Dong Xiang, Zhen Chen:
New Techniques for Accelerating Small Delay ATPG and Generating Compact Test Sets. VLSI Design 2009: 221-226 - [c36]Zhen Chen, Dong Xiang, Boxue Yin:
The ATPG Conflict-Driven Scheme for High Transition Fault Coverage and Low Test Cost. VTS 2009: 146-151 - [c35]Dong Xiang, Boxue Yin, Kwang-Ting Cheng:
Dynamic Test Compaction for Transition Faults in Broadside Scan Testing Based on an Influence Cone Measure. VTS 2009: 251-256 - 2008
- [j25]Dong Xiang, Mingjing Chen, Jia-Guang Sun:
Scan BIST with biased scan test signals. Sci. China Ser. F Inf. Sci. 51(7): 881-895 (2008) - [j24]Hui Wang, Dong Xiang, Guanghong Duan:
A genetic algorithm for product disassembly sequence planning. Neurocomputing 71(13-15): 2720-2726 (2008) - [j23]Dong Xiang, Yueli Zhang, Jia-Guang Sun:
Unicast-based fault-tolerant multicasting in wormhole-routed hypercubes. J. Syst. Archit. 54(12): 1164-1178 (2008) - [j22]Dong Xiang, Yang Zhao, Krishnendu Chakrabarty, Hideo Fujiwara:
A Reconfigurable Scan Architecture With Weighted Scan-Enable Signals for Deterministic BIST. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(6): 999-1012 (2008) - [c34]Dong Xiang, Qi Wang, Yi Pan:
Deadlock-Free Adaptive Routing in 2D Tori with a New Turn Model. ICA3PP 2008: 58-69 - [c33]Dong Xiang, Yi Pan, Qi Wang, Zhen Chen:
Deadlock-Free Fully Adaptive Routing in 2-Dimensional Tori Based on New Virtual Network Partitioning Scheme. ICDCS 2008: 454-461 - [c32]Dong Xiang, Qi Wang, Yi Pan:
Deadlock-Free Fully Adaptive Routing in Tori Based on a New Virtual Network Partitioning Scheme. ICPP 2008: 612-619 - [c31]Wei Jiang, Dong Xiang:
A Compression Framework for Personal Image Used in Mobile RFID System. ICYCS 2008: 769-774 - [c30]Zhizhou Li, Yaxiong Zhao, Yong Cui, Dong Xiang:
A Density Adaptive Routing Protocol for Large-Scale Ad Hoc Networks. WCNC 2008: 2597-2602 - 2007
- [j21]Hui Wang, Dong Xiang, Guanghong Duan, Linxuan Zhang:
Assembly planning based on semantic modeling approach. Comput. Ind. 58(3): 227-239 (2007) - [j20]Dong Xiang, Kaiwei Li, Jiaguang Sun, Hideo Fujiwara:
Reconfigured Scan Forest for Test Application Cost, Test Data Volume, and Test Power Reduction. IEEE Trans. Computers 56(4): 557-562 (2007) - [j19]Dong Xiang, Mingjing Chen, Hideo Fujiwara:
Using Weighted Scan Enable Signals to Improve Test Effectiveness of Scan-Based BIST. IEEE Trans. Computers 56(12): 1619-1628 (2007) - [j18]Dong Xiang, Kaiwei Li, Hideo Fujiwara, Krishnaiyan Thulasiraman, Jiaguang Sun:
Constraining Transition Propagation for Low-Power Scan Testing Using a Two-Stage Scan Architecture. IEEE Trans. Circuits Syst. II Express Briefs 54-II(5): 450-454 (2007) - [c29]Dong Xiang, Krishnendu Chakrabarty, Dianwei Hu, Hideo Fujiwara:
Scan Testing for Complete Coverage of Path Delay Faults with Reduced Test Data Volume, Test Application Time, and Hardware Cost. ATS 2007: 329-334 - [c28]Dong Xiang, Yueli Zhang, Yi Pan, Jie Wu:
Deadlock-Free Adaptive Routing in Meshes Based on Cost-Effective Deadlock Avoidance Schemes. ICPP 2007: 41 - [c27]Dong Xiang, Yang Zhao, Kaiwei Li, Hideo Fujiwara:
Fast and effective fault simulation for path delay faults based on selected testable paths. ITC 2007: 1-10 - [c26]Qiang Xu, Dianwei Hu, Dong Xiang:
Pattern-directed circuit virtual partitioning for test power reduction. ITC 2007: 1-10 - 2006
- [j17]Dong Xiang:
Fault-tolerant routing in hypercubes using partial path set-up. Future Gener. Comput. Syst. 22(7): 812-819 (2006) - [j16]Haipeng Wang, Zhiwen Yu, Xingshe Zhou, Tao Zhang, Dong Xiang:
Content Adaptation Based Approach for Ubiquitous Multimedia. J. Mobile Multimedia 2(2): 98-111 (2006) - [j15]Dong Xiang, Ai Chen, Jia-Guang Sun:
Fault-tolerant multicasting in hypercubes using local safety information. J. Parallel Distributed Comput. 66(2): 248-256 (2006) - [c25]Hideo Fujiwara, Jiaguang Sun, Krishnendu Chakrabarty, Yang Zhao, Dong Xiang:
Compressing Test Data for Deterministic BIST Using a Reconfigurable Scan Arhcitecture. ATS 2006: 299-306 - [c24]Dong Xiang, Kaiwei Li, Hideo Fujiwara, Jiaguang Sun:
Generating Compact Robust and Non-Robust Tests for Complete Coverage of Path Delay Faults Based on Stuck-at Tests. ICCD 2006: 446-451 - [c23]Hui Wang, Dong Xiang, Guanghong Duan, Jie Song:
A Hybrid Heuristic Approach for Disassembly/Recycle Applications. ISDA (1) 2006: 985-995 - 2005
- [j14]Dong Xiang, Ai Chen, Jiaguang Sun:
Fault-tolerant routing and multicasting in hypercubes using a partial path set-up. Parallel Comput. 31(3-4): 389-411 (2005) - [j13]Dong Xiang, Ming-Jing Chen, Jia-Guang Sun, Hideo Fujiwara:
Improving test effectiveness of scan-based BIST by scan chain partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(6): 916-927 (2005) - [c22]Dong Xiang, Ming-Jing Chen, Hideo Fujiwara:
Using Weighted Scan Enable Signals to Improve the Effectiveness of Scan-Based BIST. Asian Test Symposium 2005: 126-131 - [c21]Dong Xiang, Kaiwei Li, Hideo Fujiwara:
Design for Cost Effective Scan Testing by Reconfiguring Scan Flip-Flops. Asian Test Symposium 2005: 318-323 - [c20]Dong Xiang, Jia-Guang Sun, Jie Wu, Krishnaiyan Thulasiraman:
Fault-Tolerant Routing in Meshes/Tori Using Planarly Constructed Fault Blocks. ICPP 2005: 577-584 - 2004
- [j12]Mónica Benito, Joel S. Parker, Quan Du, Junyuan Wu, Dong Xiang, Charles M. Perou, James Stephen Marron:
Adjustment of systematic microarray data biases. Bioinform. 20(1): 105-114 (2004) - [j11]Dong Xiang, Janak H. Patel:
Partial Scan Design Based on Circuit State Information and Functional Analysis. IEEE Trans. Computers 53(3): 276-287 (2004) - [c19]Dong Xiang, Ming-Jing Chen, Kaiwei Li, Yu-Liang Wu:
Scan-Based BIST Using an Improved Scan Forest Architecture. Asian Test Symposium 2004: 88-93 - 2003
- [j10]Dong Xiang, Ai Chen, Jie Wu:
Local-Safety-Information-Based Fault-Tolerant Broadcasting in Hypercubes. J. Inf. Sci. Eng. 19(3): 467-478 (2003) - [j9]Dong Xiang, Yi Xu, Hideo Fujiwara:
Nonscan Design for Testability for Synchronous Sequential Circuits Based on Conflict Resolution. IEEE Trans. Computers 52(8): 1063-1075 (2003) - [j8]Dong Xiang, Ai Chen, Jie Wu:
Reliable broadcasting in wormhole-routed hypercube-connected networks using local safety information. IEEE Trans. Reliab. 52(2): 245-256 (2003) - [c18]Jingli Zhou, Dong Xiang, Shengsheng Yu, Lin Zhong, Jian Gu:
A Method of Data Assignment on Heterogeneous Disk System. APPT 2003: 162-166 - [c17]Dong Xiang, Ming-Jing Chen, Jia-Guang Sun, Hideo Fujiwara:
Improving Test Quality of Scan-Based BIST by Scan Chain Partitioning. Asian Test Symposium 2003: 12-17 - [c16]Dong Xiang, Shan Gu, Hideo Fujiwara:
Non-Scan Design for Testability for Mixed RTL Circuits with Both Data Paths and Controller via Conflict Analysis. Asian Test Symposium 2003: 300-305 - [c15]Dong Xiang, Shan Gu, Jia-Guang Sun, Yu-Liang Wu:
A cost-effective scan architecture for scan testing with non-scan test power and test application cost. DAC 2003: 744-747 - [c14]Dong Xiang, Ai Chen:
Partial Path Set up for Fault Tolerant Routing in Hypercubes. IPDPS 2003: 275 - 2002
- [j7]Dong Xiang, Hideo Fujiwara:
Handling the pin overhead problem of DFTs for high-quality and at-speed tests. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(9): 1105-1113 (2002) - [c13]Dong Xiang, Shan Gu, Hideo Fujiwara:
Non-Scan Design for Testability Based on Fault Oriented Conflict Analysis. Asian Test Symposium 2002: 86- - [c12]Dong Xiang, Ai Chen, Jie Wu:
Fault-Tolerant Broadcasting in Hypercubes via Local Safety Information. ICPADS 2002: 31-36 - [c11]Dong Xiang, Ai Chen:
Fault-Tolerant Routing in 2D Tori or Meshes Using Limited-Global-Safety Information. ICPP 2002: 231-238 - 2001
- [j6]Dong Xiang, Ai Chen, Jie Wu:
Local-Safety-Information-Based Broadcasting in Hypercube Multicomputers with Node and Link Faults. J. Interconnect. Networks 2(3): 365-378 (2001) - [j5]Dong Xiang:
Fault-Tolerant Routing in Hypercube Multicomputers Using Local Safety Information. IEEE Trans. Parallel Distributed Syst. 12(9): 942-951 (2001) - [c10]Dong Xiang, Yi Xu:
A Multiple Phase Partial Scan Design Method. Asian Test Symposium 2001: 17-22 - [c9]Dong Xiang, Yi Xu:
Cost-Effective Non-Scan Design for Testability for Actual Testability Improvement. ICCD 2001: 154-160 - [c8]Wenke Lee, Dong Xiang:
Information-Theoretic Measures for Anomaly Detection. S&P 2001: 130-143 - [c7]Dong Xiang, Yi Xu:
Partial Reset for Synchronous Sequential Circuits Using Almost Independent Reset Signals. VTS 2001: 82-87 - 2000
- [c6]Dong Xiang, Yi Xu, Hideo Fujiwara:
Non-scan design for testability for synchronous sequential circuits based on conflict analysis. ITC 2000: 520-529
1990 – 1999
- 1998
- [c5]Grace Wahba, Xiwu Lin, Fangyu Gao, Dong Xiang, Ronald Klein, Barbara E. Klein:
The Bias-Variance Tradeoff and the Randomized GACV. NIPS 1998: 620-626 - 1996
- [c4]Dong Xiang, Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel:
Partial Scan Design Based on Circuit State Information. DAC 1996: 807-812 - [c3]Dong Xiang, Janak H. Patel:
A Global Algorithm for the Partial Scan Design Problem Using Circuit State Information. ITC 1996: 548-557 - 1995
- [j4]Jian-Qiang Hu, Dong Xiang:
Optimal control for systems with deterministic production cycles. IEEE Trans. Autom. Control. 40(4): 782-786 (1995) - 1994
- [j3]Dong Xiang, Daozheng Wei:
GLOBAL: A design for random testability algorithm. J. Comput. Sci. Technol. 9(2): 182-192 (1994) - [j2]Jian-Qiang Hu, Dong Xiang:
Structural properties of optimal production controllers in failure-prone manufacturing systems. IEEE Trans. Autom. Control. 39(3): 640-643 (1994) - [c2]Dong Xiang, Daozheng Wei:
An Optimal Design for Parallel Test Generation Based on Circuit Partitioning. VLSI Design 1994: 297-300 - 1993
- [j1]Jian-Qiang Hu, Dong Xiang:
The queueing equivalence to a manufacturing system with failures. IEEE Trans. Autom. Control. 38(3): 499-502 (1993) - 1992
- [c1]Dong Xiang, Daozheng Wei, Shisong Chen:
A Global Test Point Placement Algorithm of Combinational Circuits. VLSI Design 1992: 227-232
Coauthor Index
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