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"A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® ..."

Cheolmin Park et al. (2010)

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DOI: 10.1109/ISSCC.2010.5434000

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Cheolmin Park, Roy Badeau, Larry Biro, Jonathan Chang, Tejpal Singh, Jim Vash, Bo Wang, Tom Wang:
A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® processor. ISSCC 2010: 180-181

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