Article

Energy and throughput efficient transactional memory for embedded multicore systems

Authors:

Maurice HerlihyAuthors Info & Claims

HiPEAC'10: Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers

Pages 50 - 65

https://doi.org/10.1007/978-3-642-11515-8_6

Published: 25 January 2010 Publication History

Abstract

We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a small, fully-associative transactional cache at the same level as the L1 cache. We propose an alternative design that unifies the transactional and L1 caches, and provides a small victim cache to reduce effects of capacity and conflict evictions. We evaluate our new HTM scheme on a variety of benchmarks, both in terms of energy and performance. We show that the victim cache scheme can provide up to a 4X improvement in energy-delay product, compared to a traditional HTM scheme that uses a separate transactional cache.

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Cited By

Papagiannopoulou DCapodanno GMoreshet THerlihy MBahar R(2015)Energy-Efficient and High-Performance Lock Speculation Hardware for Embedded Multicore SystemsACM Transactions on Embedded Computing Systems10.1145/270009714:3(1-27)Online publication date: 21-May-2015
https://dl.acm.org/doi/10.1145/2700097
Atoofian E(2013)VGTSProceedings of the 19th international conference on Parallel Processing10.1007/978-3-642-40047-6_22(203-214)Online publication date: 26-Aug-2013
https://dl.acm.org/doi/10.1007/978-3-642-40047-6_22
Hughes CLi TLowenthal Dde Supinski BMcKee S(2011)Optimizing throughput/power trade-offs in hardware transactional memory using DVFS and intelligent schedulingProceedings of the international conference on Supercomputing10.1145/1995896.1995918(141-150)Online publication date: 31-May-2011
https://dl.acm.org/doi/10.1145/1995896.1995918
Show More Cited By

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Published In

cover image Guide Proceedings

HiPEAC'10: Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers

January 2010

368 pages

ISBN:3642115144

Editors:
Yale N. Patt
Department of Electrical and Computer Engineering, The University of Texas at Austin, 1 University Station C0803, Austin
,
Pierfrancesco Foglia
Dipartimento di Ingegneria della Informazione, Università di Pisa, Via Diotisalvi 2, Pisa, Italy
,
Evelyn Duesterwald
Dipartimento di Ingegneria della Informazione, IBM T.J.Watson Research Center, 19 Skyline Drive, Hawthorne, Italy
,
Paolo Faraboschi
Dipartimento di Ingegneria della Informazione, Hewlett-Packard, Cami de Can Graells 1-21, Sant Cugat del Vallés, 19 Skyline Drive, Barcelona, Spain
,
Xavier Martorell
Computer Architecture Department, Technical University of Catalunya (UPC), c/Jordi Girona 1-3, Barcelona, Spain

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Springer-Verlag

Berlin, Heidelberg

Publication History

Published: 25 January 2010

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Cited By

Papagiannopoulou DCapodanno GMoreshet THerlihy MBahar R(2015)Energy-Efficient and High-Performance Lock Speculation Hardware for Embedded Multicore SystemsACM Transactions on Embedded Computing Systems10.1145/270009714:3(1-27)Online publication date: 21-May-2015
https://dl.acm.org/doi/10.1145/2700097
Atoofian E(2013)VGTSProceedings of the 19th international conference on Parallel Processing10.1007/978-3-642-40047-6_22(203-214)Online publication date: 26-Aug-2013
https://dl.acm.org/doi/10.1007/978-3-642-40047-6_22
Hughes CLi TLowenthal Dde Supinski BMcKee S(2011)Optimizing throughput/power trade-offs in hardware transactional memory using DVFS and intelligent schedulingProceedings of the international conference on Supercomputing10.1145/1995896.1995918(141-150)Online publication date: 31-May-2011
https://dl.acm.org/doi/10.1145/1995896.1995918
Kunz LGirão GWagner FMartino JAraújo GOrailoglu AKlein F(2010)Evaluation of a hardware transactional memory model in an NoC-based embedded MPSoCProceedings of the 23rd symposium on Integrated circuits and system design10.1145/1854153.1854177(85-90)Online publication date: 6-Sep-2010
https://dl.acm.org/doi/10.1145/1854153.1854177

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