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Analysis of multiple-bus interconnection networks

Published: 01 September 1986 Publication History

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  • (2016)Reliability Analysis of Fault-Tolerant Bus-Based Interconnection NetworksJournal of Electronic Testing: Theory and Applications10.1007/s10836-016-5601-532:5(541-568)Online publication date: 1-Oct-2016
  • (2013)MVA-Based Probabilistic Model of Shared Memory with a Round Robin Arbiter for Predicting Performance with Heterogeneous WorkloadProceedings of the International Conference on Multicore Software Engineering, Performance, and Tools - Volume 806310.1007/978-3-642-39955-8_2(13-24)Online publication date: 19-Aug-2013
  • (2011)Coarse-grained simulation method for performance evaluation of a shared memory systemProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950903(413-418)Online publication date: 25-Jan-2011
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Academic Press, Inc.

United States

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Published: 01 September 1986

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Cited By

View all
  • (2016)Reliability Analysis of Fault-Tolerant Bus-Based Interconnection NetworksJournal of Electronic Testing: Theory and Applications10.1007/s10836-016-5601-532:5(541-568)Online publication date: 1-Oct-2016
  • (2013)MVA-Based Probabilistic Model of Shared Memory with a Round Robin Arbiter for Predicting Performance with Heterogeneous WorkloadProceedings of the International Conference on Multicore Software Engineering, Performance, and Tools - Volume 806310.1007/978-3-642-39955-8_2(13-24)Online publication date: 19-Aug-2013
  • (2011)Coarse-grained simulation method for performance evaluation of a shared memory systemProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950903(413-418)Online publication date: 25-Jan-2011
  • (2001)Families of Optimal Fault-Tolerant Multiple-Bus NetworksIEEE Transactions on Parallel and Distributed Systems10.1109/71.89993912:1(60-73)Online publication date: 1-Jan-2001
  • (1999)A combinatorial approach to performance analysis of a shared-memory multiprocessorProceedings of the 5th annual international conference on Computing and combinatorics10.5555/1765751.1765816(462-472)Online publication date: 26-Jul-1999
  • (1996)Analysis of Memory Interference in Buffered Multiprocessor Systems in Presence of Hot Spots and Favorite MemoriesProceedings of the 10th International Parallel Processing Symposium10.5555/645606.660878(281-285)Online publication date: 15-Apr-1996
  • (1996)Performance Model for a Prioritized Multiple-Bus Multiprocessor SystemIEEE Transactions on Computers10.1109/12.50990945:5(580-588)Online publication date: 1-May-1996
  • (1991)Analysis of Packet-Switched Multiple-Bus Multiprocessor SystemsIEEE Transactions on Computers10.1109/12.7641440:3(352-357)Online publication date: 1-Mar-1991
  • (1989)Performance of Multiprocessor Interconnection NetworksComputer10.1109/2.1983022:2(25-37)Online publication date: 1-Feb-1989

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