research-article

Design of quaternary 4-2 and 5-2 compressors for nanotechnology

Authors:

Hojjat Sharifi,

Nader Bagherzadeh,

Himanshu ThapliyalAuthors Info & Claims

Computers and Electrical Engineering, Volume 56, Issue C

Pages 64 - 74

https://doi.org/10.1016/j.compeleceng.2016.11.006

Published: 01 November 2016 Publication History

Abstract

Recently, Multiple Valued Logic (MVL) has attracted attention, because it reduces the area and complexity of circuits when compared to binary logic. Carbon nanotube field effect transistors (CNFET) are a good candidate for implementing MVL logic circuits, since determining the threshold voltage value of CNFET is easily achievable by changing the diameter of the nanotubes which are placed under the transistor gate. In this paper, quaternary CNFET based 4-2 and 5-2 compressor cells have been proposed. The proposed cell designs were investigated using HSPICE simulator with the standard 32nm CNFET technology under different operational conditions such as different temperatures, different load capacitances, and different supply voltages. Also the sensitivity to process variations and noise immunity of the proposed designs have been investigated. The proposed quaternary logic designs reduce the delay of the multi operand addition of arithmetic circuits by eliminating the carry propagation overhead.

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Cited By

Navidi AKhani MSabbaghi-Nadooshan R(2024)Design and simulation of assorted functional QQCA circuitsAnalog Integrated Circuits and Signal Processing10.1007/s10470-023-02228-x119:2(375-387)Online publication date: 1-May-2024
https://dl.acm.org/doi/10.1007/s10470-023-02228-x
Taheri MShafiee NSharifi FMoaiyeri MNavi KBagherzadeh N(2021)Energy efficient hybrid full adder design for digital signal processing in nanoelectronicsAnalog Integrated Circuits and Signal Processing10.1007/s10470-021-01831-0109:1(135-151)Online publication date: 1-Oct-2021
https://dl.acm.org/doi/10.1007/s10470-021-01831-0
Tabrizchi SSharifi FDehghani P(2021)Energy-Efficient and PVT-Tolerant CNFET-Based Ternary Full Adder CellCircuits, Systems, and Signal Processing10.1007/s00034-020-01638-w40:7(3523-3535)Online publication date: 1-Jul-2021
https://dl.acm.org/doi/10.1007/s00034-020-01638-w
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Design of quaternary 4-2 and 5-2 compressors for nanotechnology
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Published In

cover image Computers and Electrical Engineering

Computers and Electrical Engineering Volume 56, Issue C

November 2016

907 pages

ISSN:0045-7906

Issue’s Table of Contents

Copyright © Elsevier Ltd.

Publisher

Pergamon Press, Inc.

United States

Publication History

Published: 01 November 2016

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Cited By

Navidi AKhani MSabbaghi-Nadooshan R(2024)Design and simulation of assorted functional QQCA circuitsAnalog Integrated Circuits and Signal Processing10.1007/s10470-023-02228-x119:2(375-387)Online publication date: 1-May-2024
https://dl.acm.org/doi/10.1007/s10470-023-02228-x
Taheri MShafiee NSharifi FMoaiyeri MNavi KBagherzadeh N(2021)Energy efficient hybrid full adder design for digital signal processing in nanoelectronicsAnalog Integrated Circuits and Signal Processing10.1007/s10470-021-01831-0109:1(135-151)Online publication date: 1-Oct-2021
https://dl.acm.org/doi/10.1007/s10470-021-01831-0
Tabrizchi SSharifi FDehghani P(2021)Energy-Efficient and PVT-Tolerant CNFET-Based Ternary Full Adder CellCircuits, Systems, and Signal Processing10.1007/s00034-020-01638-w40:7(3523-3535)Online publication date: 1-Jul-2021
https://dl.acm.org/doi/10.1007/s00034-020-01638-w
Nayeri MKeshavarzian PNayeri M(2019)Approach for MVL design based on armchair graphene nanoribbon field effect transistor and arithmetic circuits designMicroelectronics Journal10.1016/j.mejo.2019.07.01792:COnline publication date: 1-Oct-2019
https://dl.acm.org/doi/10.1016/j.mejo.2019.07.017

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