article

Beyond the conventional transistor

Author:

H.-S. P. WongAuthors Info & Claims

IBM Journal of Research and Development, Volume 46, Issue 2-3

Pages 133 - 168

https://doi.org/10.1147/rd.462.0133

Published: 01 March 2002 Publication History

Abstract

This paper focuses on approaches to continuing CMOS scaling by introducing new device structures and new materials. Starting from an analysis of the sources of improvements in device performance, we present technology options for achieving these performance enhancements. These options include high-dielectric-constant (high-k) gate dielectric, metal gate electrode, double-gate FET, and strained-silicon FET. Nanotechnology is examined in the context of continuing the progress in electronic systems enabled by silicon microelectronics technology. The carbon nanotube field-effect transistor is examined as an example of the evaluation process required to identify suitable nanotechnologies for such purposes.

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Beyond the conventional transistor
1. Hardware
2. Networks
  1. Network types
    1. Ad hoc networks
      1. Mobile ad hoc networks

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cover image IBM Journal of Research and Development

IBM Journal of Research and Development Volume 46, Issue 2-3

March 2002

236 pages

ISSN:0018-8646

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IBM Corp.

United States

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Accepted: 06 March 2002

Published: 01 March 2002

Received: 06 November 2001

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https://dl.acm.org/doi/10.1016/j.mejo.2024.106220
Chandra KKishore K(2023)Design and Analysis of Low Power FinFET SRAM with Leakage Current Reduction TechniquesWireless Personal Communications: An International Journal10.1007/s11277-023-10475-4131:2(1167-1188)Online publication date: 21-Jun-2023
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