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Grasping the gap between blocking and non-blocking transactional memories

Published: 01 March 2017 Publication History

Abstract

Transactional memory (TM) is an inherently optimistic abstraction: it allows concurrent processes to execute sequences of shared-data accesses (transactions) speculatively, with an option of aborting them in the future. Early TM designs avoided using locks and relied on non-blocking synchronization to ensure obstruction-freedom: a transaction that encounters no step contention is not allowed to abort. However, it was later observed that obstruction-free TMs perform poorly and, as a result, state-of-the-art TM implementations are nowadays blocking, allowing aborts because of data conflicts rather than step contention.In this paper, we explain this shift in the TM practice theoretically, via complexity bounds. We prove a few important lower bounds on obstruction-free TMs. Then we present a lock-based TM implementation that beats all of these lower bounds. In sum, our results exhibit a considerable complexity gap between non-blocking and blocking TM implementations. Impossibility of scalable obstruction-free TMs and read invisibility.Read operation in obstruction-free TMs may incur linear memory stalls.Obstruction-free transactions may incur linear expensive synchronization.There is a progressive TM that beats all the above lower bounds.

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  • (2018)Inherent limitations of hybrid transactional memoryDistributed Computing10.1007/s00446-017-0305-331:3(167-185)Online publication date: 1-Jun-2018

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Published In

cover image Journal of Parallel and Distributed Computing
Journal of Parallel and Distributed Computing  Volume 101, Issue C
March 2017
103 pages

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Academic Press, Inc.

United States

Publication History

Published: 01 March 2017

Author Tags

  1. Blocking
  2. Disjoint-access parallelism
  3. Expensive synchronization
  4. Invisible reads
  5. Lower bounds
  6. Memory stalls
  7. Non-blocking
  8. Obstruction-freedom
  9. Perturbability
  10. Transactional memory

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  • (2018)Inherent limitations of hybrid transactional memoryDistributed Computing10.1007/s00446-017-0305-331:3(167-185)Online publication date: 1-Jun-2018

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