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A new NAND-type flash memory package with smart buffer system for spatial and temporal localities

Published: 01 February 2005 Publication History

Abstract

This research is to design a high performance NAND-type flash memory package with a smart buffer cache that enhances the exploitation of spatial and temporal locality. The proposed buffer structure in a NAND flash memory package, called as a smart buffer cache, consists of three parts, i.e., a fully-associative victim buffer with a small page size, a fully-associative spatial buffer with a large page size, and a dynamic fetching unit. This new NAND-type flash memory package can achieve dramatically higher performance and lower power consumption compared with any conventional NAND-type flash memory module. Our results show that the NAND flash memory package with a smart buffer cache can reduce the miss ratio by around 70% and the average memory access time by around 67%, over the conventional NAND flash memory configuration. Also, the average miss ratio and the average memory access time of the package module with smart buffer cache for a given buffer space (e.g., 3 KB) can achieve better performance than package modules with a conventional direct-mapped buffer with eight times (e.g., 32 KB) or than a fully-associative configuration with twice as much space (e.g., 8 KB).

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  • (2013)Migration-based hybrid cache design for file systems over flash storage devicesACM SIGAPP Applied Computing Review10.1145/2577554.257755613:4(8-16)Online publication date: 1-Dec-2013
  • (2013)A reliability enhancement design under the flash translation layer for MLC-based flash-memory storage systemsACM Transactions on Embedded Computing Systems10.1145/251246713:1(1-28)Online publication date: 5-Sep-2013
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Published In

cover image Journal of Systems Architecture: the EUROMICRO Journal
Journal of Systems Architecture: the EUROMICRO Journal  Volume 51, Issue 2
February 2005
71 pages

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Elsevier North-Holland, Inc.

United States

Publication History

Published: 01 February 2005

Author Tags

  1. NAND-type flash memory
  2. memory hierarchy
  3. spatial locality
  4. temporal locality

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Cited By

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  • (2015)NAND flash memory system based on the Harvard buffer architecture for multimedia applicationsMultimedia Tools and Applications10.1007/s11042-014-2122-z74:16(6287-6302)Online publication date: 1-Aug-2015
  • (2013)Migration-based hybrid cache design for file systems over flash storage devicesACM SIGAPP Applied Computing Review10.1145/2577554.257755613:4(8-16)Online publication date: 1-Dec-2013
  • (2013)A reliability enhancement design under the flash translation layer for MLC-based flash-memory storage systemsACM Transactions on Embedded Computing Systems10.1145/251246713:1(1-28)Online publication date: 5-Sep-2013
  • (2012)MFTLACM Transactions on Storage10.1145/2180905.21809088:2(1-29)Online publication date: 1-May-2012
  • (2011)What is the future of disk drives, death or rebirth?ACM Computing Surveys10.1145/1922649.192266043:3(1-27)Online publication date: 29-Apr-2011
  • (2010)A reliable MTD design for MLC flash-memory storage systemsProceedings of the tenth ACM international conference on Embedded software10.1145/1879021.1879045(179-188)Online publication date: 24-Oct-2010
  • (2010)A strategy to emulate NOR flash with NAND flashACM Transactions on Storage10.1145/1807060.18070626:2(1-23)Online publication date: 30-Jul-2010
  • (2010)Key-Study to execute code using demand paging and NAND flash at smart card scaleProceedings of the 9th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Application10.1007/978-3-642-12510-2_8(102-117)Online publication date: 14-Apr-2010
  • (2009)A set-based mapping strategy for flash-memory reliability enhancementProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874717(405-410)Online publication date: 20-Apr-2009

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