research-article

Minimization of AND-EXOR Expressions Using Rewrite Rules

Authors:

T. SasaoAuthors Info & Claims

IEEE Transactions on Computers, Volume 42, Issue 5

Pages 568 - 576

https://doi.org/10.1109/12.223676

Published: 01 May 1993 Publication History

Abstract

Conditions for generating optimal two-level AND-EXOR representations using rewrite rules are considered. Four results are presented. First, it is shown that a necessary condition for obtaining minimality is a temporary increase in the size of expressions during minimization. Second, a sufficient condition for obtaining minimality that consists of adding certain two rules to rule sets proposed in the literature is given. Third, transformations that allow the minimization of an expression to proceed by minimizing a transformed expression instead are defined. Fourth, it is determined experimentally that the above three theoretical results lead to better benchmarks results as well.

References

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{3} R. K. Brayton, G. D. Hachtel, C. T. McMullen, and A. L. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis. Boston, MA: Kluwer, 1984.

Digital Library

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{4} D. Brand and T. Sasao, "On the minimization of AND-EXOR expressions," Res. Rep. RC 16739, IBM T. J. Watson Research Center, Apr. 1991.

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{8} H. Fujiwara, Logic Testing and Design for Testability. Cambridge, MA: Computer Systems Series, M.I.T. Press, 1986.

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{9} M. Helliwel and M. Perkowski, "A fast algorithm to minimize multi-output mixed polarity generalized Reed-Muller forms," in Proc. 25th Design Automat. Conf., June 1988, pp. 427-432.

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{15} G. Papakonstantinou, "Minimization of modulo-2 sum of products," IEEE Trans. Comput., vol, C-28, pp. 163-167, Feb. 1979.

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{19} T. Sasao, "Input variable assignment and output phase optimization of PLA's," IEEE Trans. Comput., vol. C-33, no. 10, pp. 879-894, Oct. 1984.

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{20} T. Sasao and P. Besslich, "On the complexity of MOD-2 sum PLA's," IEEE Trans. Comput., vol. 39, no. 2, pp. 262-266, Feb. 1990.

Digital Library

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{21} T. Sasao, "EXMIN: A simplification algorithm for Exclusive-OR-Sum-of-Products expressions for multiple-valued input two-valued output functions," ISMVL-90, Charlotte, NC, May 1990.

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{22} T. Sasao, "Exclusive-or Sum-of-Products expressions: Their properties and minimization algorithm," IEICE Tech. Rep., VLD90-87, Dec. 1990.

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{23} T. Sasao, "A transformation of multiple-valued input two-valued output functions and its application to simplification of exclusive-or sum-of-products expressions," in Proc. ISMVL-91, Victoria, BC, Canada, May 1991, pp. 270-279.

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{24} T. Sasao, "Logic Synthesis with EXOR Gates," in Logic Synthesis and Optimization, T. Sasao, Ed. Boston: Kluwer, 1993, pp. 259-285.

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{25} J. M. Saul, "An improved algorithm for the minimization of mixed polarity Reed-Muller representation," in Proc. ICCD-90, Cambridge, MA, pp. 372-375.

Cited By

Häner TSoeken M(2022)Lowering the T-depth of Quantum Circuits via Logic Network OptimizationACM Transactions on Quantum Computing10.1145/35013343:2(1-15)Online publication date: 4-Mar-2022
https://dl.acm.org/doi/10.1145/3501334
Drechsler RHengster HSchäfer HHartmann JBecker B(1999)Testability of 2-Level AND/EXOR CircuitsJournal of Electronic Testing: Theory and Applications10.1023/A:100830600288214:3(219-225)Online publication date: 1-Jun-1999
https://dl.acm.org/doi/10.1023/A%3A1008306002882
Drechsler RHengster HSchafer HHartmann JBecker B(1997)Testability of 2-level AND/EXOR circuitsProceedings of the 1997 European conference on Design and Test10.5555/787260.787722Online publication date: 17-Mar-1997
https://dl.acm.org/doi/10.5555/787260.787722

Index Terms

Minimization of AND-EXOR Expressions Using Rewrite Rules
1. Theory of computation
  1. Formal languages and automata theory
    1. Formalisms
      1. Rewrite systems
    2. Grammars and context-free languages

Index terms have been assigned to the content through auto-classification.

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cover image IEEE Transactions on Computers

IEEE Transactions on Computers Volume 42, Issue 5

May 1993

134 pages

ISSN:0018-9340

Issue’s Table of Contents

Copyright © Copyright © 1993 IEEE. All Rights Reserved.

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IEEE Computer Society

United States

Publication History

Published: 01 May 1993

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Cited By

Häner TSoeken M(2022)Lowering the T-depth of Quantum Circuits via Logic Network OptimizationACM Transactions on Quantum Computing10.1145/35013343:2(1-15)Online publication date: 4-Mar-2022
https://dl.acm.org/doi/10.1145/3501334
Drechsler RHengster HSchäfer HHartmann JBecker B(1999)Testability of 2-Level AND/EXOR CircuitsJournal of Electronic Testing: Theory and Applications10.1023/A:100830600288214:3(219-225)Online publication date: 1-Jun-1999
https://dl.acm.org/doi/10.1023/A%3A1008306002882
Drechsler RHengster HSchafer HHartmann JBecker B(1997)Testability of 2-level AND/EXOR circuitsProceedings of the 1997 European conference on Design and Test10.5555/787260.787722Online publication date: 17-Mar-1997
https://dl.acm.org/doi/10.5555/787260.787722

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