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Lossless Trace Compression

Published: 01 February 2001 Publication History

Abstract

The tremendous storage space required for a useful data base of program traces has prompted a search for trace reduction techniques. In this paper, we discuss a range of information-lossless address and instruction trace compression schemes that can reduce both storage space and access time by an order of magnitude or more, without discarding either references or interreference timing information from the original trace. The PDATS family of trace compression techniques achieves trace coding densities of about six references per byte. This family of techniques is now in use as the standard in the NMSU TraceBase, an extensive trace archive that has been established for use by the international research and teaching community.

References

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M.D. Hill, “DineroIII Documentation, Unpublished Unix-Style Man Page,” Univ. of California, Berkeley, Oct. 1985.
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A.J. Smith, “Two Methods for the Efficient Analysis of Memory Address Trace Data,” IEEE Trans. Software Eng., vol. 3, no. 1, 1977.
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T.R. Puzak, “Analysis of Cache Replacement Algorithms,” PhD dissertation, Univ. of Massachusetts, 1985.
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A. Agarwal and M. Huffman, “Blocking: Exploiting Spatial Locality for Trace Compaction,” Proc. ACM SIGMETRICS, 1990.
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E.E. Johnson and C.D. Schieber, “RATCHET: Real-Time Address Trace Compression Hardware for Extended Traces,” Performance Evaluation Review, vol. 21, nos. 3-4, pp. 22-32, Apr. 1994.
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S. Das and E.E. Johnson, “Accuracy of Filtered Traces,” Proc. IEEE Int'l Phoenix Conf. Computers and Comm., pp. 82-86, Apr. 1995.
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J.W.C. Fu and J.H. Patel, “Trace Driven Simulation Using Sampled Traces,” Proc. 27th Ann. Hawaii Int'l Conf. System Sciences, pp. 211-220, 1994.
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A.D. Samples, “Mache: No-Loss Trace Compaction,” Proc. ACM SIGMETRICS 1989, pp. 89-97, 1989.
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E.E. Johnson and J. Ha, “PDATS: Lossless Address Trace Compression for Reducing File Size and Access Time,” Proc. IEEE Int'l Phoenix Conf. Computers and Comm., pp. 213-219, May 1994.
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J.L. Hennessy and D.A. Patterson, Computer Architecture—A Quantitative Approach. San Mateo, alif.: Morgan Kaufmann, 1990.
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Cited By

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  • (2017)Efficient Generation of Compact Execution Traces for Multicore Architectural SimulationsACM Transactions on Architecture and Code Optimization10.1145/310634214:3(1-25)Online publication date: 30-Aug-2017
  • (2015)ITFCompProceedings of the 8th International Conference on Simulation Tools and Techniques10.4108/eai.24-8-2015.2260596(200-207)Online publication date: 24-Aug-2015
  • (2012)A metamodel for the compact but lossless exchange of execution tracesSoftware and Systems Modeling (SoSyM)10.1007/s10270-010-0180-x11:1(77-98)Online publication date: 1-Feb-2012
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Reviews

Timothy C. Bell

Performance evaluation of computer systems often relies on the offline analysis of traces of actual program execution. A trace of even a few seconds can record millions of events, so the size of trace files can get out of hand quickly. Johnson and Ha describe techniques for compressing trace files, which result in a reduction in size by a factor of 20 to 50 compared with existing formats. As well as saving space, the smaller files can be significantly faster to read, so overall time savings are also made in the performance evaluation process. The method proposed, called PDATS, takes advantage of locality of reference and repetition in the trace files by storing differences and repeat counts. This provides good compression, but significantly better compression is achieved by further compressing the PDATS format with a Ziv-Lempel compressor. A further extension, called PDI, achieves even more compression by using a separate code for the 256 most common instructions. The paper includes a very brief comparison with the Mache system, which predates PDATS by about ten years, and given the similarities of the two systems, a more careful comparison would have been helpful. In general, the paper is clearly written. However, the tables would benefit from clearer labeling, the method of measuring compression is not stated clearly, and the abbreviation “pdt” appears suddenly. There is also some confusion between Ziv-Lempel methods (for example, the LZ method seems to be the gzip program). The paper describes and carefully evaluates a method that, while relatively simple, is highly practical, and is likely to be of significant value to the performance evaluation community. Online Computing Reviews Service

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Published In

cover image IEEE Transactions on Computers
IEEE Transactions on Computers  Volume 50, Issue 2
February 2001
95 pages
ISSN:0018-9340
Issue’s Table of Contents

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IEEE Computer Society

United States

Publication History

Published: 01 February 2001

Author Tags

  1. Trace reduction
  2. lossless coding
  3. trace compression
  4. trace-driven simulation.

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Cited By

View all
  • (2017)Efficient Generation of Compact Execution Traces for Multicore Architectural SimulationsACM Transactions on Architecture and Code Optimization10.1145/310634214:3(1-25)Online publication date: 30-Aug-2017
  • (2015)ITFCompProceedings of the 8th International Conference on Simulation Tools and Techniques10.4108/eai.24-8-2015.2260596(200-207)Online publication date: 24-Aug-2015
  • (2012)A metamodel for the compact but lossless exchange of execution tracesSoftware and Systems Modeling (SoSyM)10.1007/s10270-010-0180-x11:1(77-98)Online publication date: 1-Feb-2012
  • (2010)A reverse-encoding-based on-chip bus tracer for efficient circular-buffer utilizationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.201487218:5(732-741)Online publication date: 1-May-2010
  • (2009)A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilizationProceedings of the 2009 Asia and South Pacific Design Automation Conference10.5555/1509633.1509796(721-726)Online publication date: 19-Jan-2009
  • (2008)A multi-resolution AHB bus tracer for real-time compression of forward/backward traces in a circular bufferProceedings of the 45th annual Design Automation Conference10.1145/1391469.1391687(862-865)Online publication date: 8-Jun-2008
  • (2007)Instruction trace compression for rapid instruction cache simulationProceedings of the conference on Design, automation and test in Europe10.5555/1266366.1266538(803-808)Online publication date: 16-Apr-2007
  • (2007)An efficient single-pass trace compression technique utilizing instruction streamsACM Transactions on Modeling and Computer Simulation10.1145/1189756.118975817:1(2-es)Online publication date: 1-Jan-2007
  • (2005)The VPC Trace-Compression AlgorithmsIEEE Transactions on Computers10.1109/TC.2005.18654:11(1329-1344)Online publication date: 1-Nov-2005
  • (2004)VPC3ACM SIGMETRICS Performance Evaluation Review10.1145/1012888.100570832:1(167-176)Online publication date: 1-Jun-2004
  • Show More Cited By

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