Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
research-article

SPICE models for flicker noise in n-MOSFETs from subthreshold to strong inversion

Published: 01 November 2006 Publication History

Abstract

The two main sources of low-frequency flicker noise are mobility fluctuations and number fluctuations. Our experiments on NMOS noise measurements were done from subthreshold to saturation region of operation for both long-channel (5 μm) and short-channel (as small as 0.6 μm) NMOS transistors. The results suggest that for both types that in the saturation region, the flicker noise is due to the surface state effect and the noise equations, NLEV=2 and 3, in SPICE, HSPICE, and PSPICE are most appropriate. For short-channel devices, due to the effects of velocity saturation and the resulting nonlinear transconductance (gm) variation with gate bias voltage, the input-referred voltage noise increases as the gate-source voltage increases instead of staying constant as it does for long-channel devices. In the subthreshold region, the input-referred voltage noise decreases drastically as the gate-source voltage increases for both long-channel and short-channel NMOS devices. Simulations have been done using PSPICE and HSPICE, with noise level (NLEV)=3 and device model level 3 and BSIM 3.2 and 3.3. The results from PSPICE version 8.0 level 7 (BSIM 3.3) and SPICE level 3 compare favorably with the measured noise phenomena for the short-channel and long-channel NMOS devices, respectively

Cited By

View all
  • (2018)Figure-of-merit-based area-constrained design of differential amplifiersVLSI Design10.1155/2008/8479322008:2(1-5)Online publication date: 17-Dec-2018

Recommendations

Comments

Information & Contributors

Information

Published In

cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 19, Issue 11
November 2006
167 pages

Publisher

IEEE Press

Publication History

Published: 01 November 2006

Qualifiers

  • Research-article

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)0
  • Downloads (Last 6 weeks)0
Reflects downloads up to 12 Nov 2024

Other Metrics

Citations

Cited By

View all
  • (2018)Figure-of-merit-based area-constrained design of differential amplifiersVLSI Design10.1155/2008/8479322008:2(1-5)Online publication date: 17-Dec-2018

View Options

View options

Get Access

Login options

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media