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View all- Elboim YKolodny AGinosar R(2018)A clock-tuning circuit for system-on-chipIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2003.81237111:4(616-626)Online publication date: 29-Dec-2018
- Wang BKuo AFarahmand TIvanov ACho YTabatabaei S(2005)A realistic timing test model and its applications in high-speed interconnect devicesJournal of Electronic Testing: Theory and Applications10.1007/s10836-005-4819-421:6(621-630)Online publication date: 1-Dec-2005