Asynchronous Nano-Electronics: Preliminary Investigation

This paper presents a proof that the adversary path timing assumption is both necessary and sufficient for correct SI circuit operation. This assumption requires that the delay of a wire on one branch of a fork be less than the delay through a gate ...

The class of quasi-delay-insensitive (QDI) asynchronous circuits provides a promising approach toward tolerating process variations. However, the fundamental assumption of QDI circuits is that some wires in such circuits are isochronic; this assumption ...

CMOS technology scaling has reached a point where the circuit's static power is as high as the dynamic power. While further process scaling will only worsen leakage in transistors, it will benefit NEM relay technology. As asynchronous circuit design ...