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10.1109/HPCA.2012.6168952guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
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BulkSMT: Designing SMT processors for atomic-block execution

Published: 25 February 2012 Publication History

Abstract

Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior proposals for such architectures assume single-context cores as building blocks--rather than the widely-used Simultaneous Multithreading (SMT) cores. As a result, they are underutilizing hardware resources. This paper presents the first SMT design that supports continuous chunked (or transactional) execution of its contexts. Our design, called BulkSMT, can be used either in a single-core processor or in a multicore of SMTs. We present a set of BulkSMT configurations with different cost and performance. We also describe the architectural primitives that enable chunked execution in an SMT core and in a multicore of SMTs. Our results, based on simulations of SPLASH-2 and PARSEC codes, show that BulkSMT supports chunked execution cost-effectively. In a 4-core multicore with eager chunked execution, BulkSMT reduces the execution time of the applications by an average of 26% compared to running on single-context cores. In a single core, the average reduction is 32%.

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cover image Guide Proceedings
HPCA '12: Proceedings of the 2012 IEEE 18th International Symposium on High-Performance Computer Architecture
February 2012
457 pages
ISBN:9781467308274

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IEEE Computer Society

United States

Publication History

Published: 25 February 2012

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  • (2016)CASPARACM SIGPLAN Notices10.1145/2954679.287240051:4(789-804)Online publication date: 25-Mar-2016
  • (2016)CASPARProceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/2872362.2872400(789-804)Online publication date: 25-Mar-2016
  • (2014)OmniOrderProceeding of the 41st annual international symposium on Computer architecuture10.5555/2665671.2665734(421-432)Online publication date: 14-Jun-2014
  • (2014)OmniOrderACM SIGARCH Computer Architecture News10.1145/2678373.266573442:3(421-432)Online publication date: 14-Jun-2014
  • (2014)Effective Transactional Memory Execution Management for Improved ConcurrencyACM Transactions on Architecture and Code Optimization10.1145/263304811:3(1-27)Online publication date: 13-Aug-2014
  • (2013)Energy efficient GPU transactional memory via space-time optimizationsProceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/2540708.2540743(408-420)Online publication date: 7-Dec-2013
  • (2013)BulkCommitProceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/2540708.2540740(371-382)Online publication date: 7-Dec-2013
  • (2013)SCIN-cacheACM Transactions on Architecture and Code Optimization10.1145/2400682.24007179:4(1-26)Online publication date: 20-Jan-2013

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