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10.1109/HPCA.2012.6168951guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
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p-TM: Pessimistic invalidation for scalable lazy hardware transactional memory

Published: 25 February 2012 Publication History

Abstract

Lazy hardware transactional memory has been shown to be more efficient at extracting available concurrency than its eager counterpart. However, it poses scalability challenges at commit time as existence of conflicts among concurrent transactions is not known prior to commit. Non-conflicting transactions may have to wait before committing, severely affecting performance in certain workloads. Early conflict detection can be employed to allow such transactions to commit simultaneously. In this paper we show that the potential of this technique has not yet been fully utilized, with design choices in prior work severely burdening common-case transactional execution to avoid some relatively uncommon correctness concerns. The paper quantifies the severity of the problem and develops µ-TM, an early conflict detection--lazy conflict resolution design. This design highlights how, with modest extensions to existing directory-based coherence protocols, information regarding possible conflicts can be effectively used to achieve true parallelism at commit without burdening the common-case. We leverage the observation that contention is typically seen on only a small fraction of shared data accessed by coarse-grained transactions. Pessimistic invalidation of such lines when committing or aborting, therefore, enables fast common-case execution. Our results show that µ-TM performs consistently well and, in particular, far better than previous work on early conflict detection in lazy HTM. We also identify a pathological scenario that lazy designs with early conflict detection suffer from and propose a simple hardware workaround to sidestep it.

Cited By

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  • (2016)A Filtering Mechanism to Reduce Network Bandwidth Utilization of Transaction ExecutionACM Transactions on Architecture and Code Optimization10.1145/283702812:4(1-26)Online publication date: 4-Jan-2016
  • (2014)Consolidated conflict detection for hardware transactional memoryProceedings of the 23rd international conference on Parallel architectures and compilation10.1145/2628071.2628076(201-212)Online publication date: 24-Aug-2014
  • (2013)Techniques to improve performance in requester-wins hardware transactional memoryACM Transactions on Architecture and Code Optimization10.1145/2541228.255529910:4(1-25)Online publication date: 1-Dec-2013

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cover image Guide Proceedings
HPCA '12: Proceedings of the 2012 IEEE 18th International Symposium on High-Performance Computer Architecture
February 2012
457 pages
ISBN:9781467308274

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IEEE Computer Society

United States

Publication History

Published: 25 February 2012

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Cited By

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  • (2016)A Filtering Mechanism to Reduce Network Bandwidth Utilization of Transaction ExecutionACM Transactions on Architecture and Code Optimization10.1145/283702812:4(1-26)Online publication date: 4-Jan-2016
  • (2014)Consolidated conflict detection for hardware transactional memoryProceedings of the 23rd international conference on Parallel architectures and compilation10.1145/2628071.2628076(201-212)Online publication date: 24-Aug-2014
  • (2013)Techniques to improve performance in requester-wins hardware transactional memoryACM Transactions on Architecture and Code Optimization10.1145/2541228.255529910:4(1-25)Online publication date: 1-Dec-2013

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