research-article

BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework

Authors:

Martin D.F. WongAuthors Info & Claims

2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)

Pages 1 - 9

https://doi.org/10.1109/ICCAD51958.2021.9643455

Published: 01 November 2021 Publication History

Abstract

The microarchitecture design of a processor has been increasingly difficult due to the large design space and time-consuming verification flow. Previously, researchers rely on prior knowledge and cycle-accurate simulators to analyze the performance of different microarchitecture designs but lack sufficient discussions on methodologies to strike a good balance between power and performance. This work proposes an automatic framework to explore microarchitecture designs of the RISC-V Berkeley Out-of-Order Machine (BOOM), termed as BOOM-Explorer, achieving a good trade-off on power and performance. Firstly, the framework utilizes an advanced microarchitecture-aware active learning (MicroAL) algorithm to generate a diverse and representative initial design set. Secondly, a Gaussian process model with deep kernel learning functions (DKL-GP) is built to characterize the design space. Thirdly, correlated multi-objective Bayesian optimization is leveraged to explore Pareto-optimal designs. Experimental results show that BOOM-Explorer can search for designs that dominate previous arts and designs developed by senior engineers in terms of power and performance within a much shorter time.

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2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)

Nov 2021

1272 pages

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IEEE Press

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Published: 01 November 2021

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Cited By

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https://dl.acm.org/doi/10.1145/3670474.3685969
Guo CWu HLuk W(2024)Resource-Constraint Bayesian Optimization for Soft Processors on FPGAsProceedings of the 14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies10.1145/3665283.3665291(27-36)Online publication date: 19-Jun-2024
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Liu TWang QLiu LWang FYoung E(2024)On Advanced Methodologies for Microarchitecture Design Space ExplorationProceedings of the Great Lakes Symposium on VLSI 202410.1145/3649476.3658764(376-382)Online publication date: 12-Jun-2024
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Luo DSun QLi XBai CYu BGeng HDe V(2024)Knowing The Spec to Explore The Design via Transformed Bayesian OptimizationProceedings of the 61st ACM/IEEE Design Automation Conference10.1145/3649329.3658262(1-6)Online publication date: 23-Jun-2024
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