Evaluation of Rodinia Codes on Intel Xeon Phi

High performance computing (HPC) is a niche area where various parallel benchmarks are constantly used to explore and evaluate the performance of Heterogeneous computing systems on the horizon. The Rodinia benchmark suite, a collection of parallel programs is one of them. These parallel programs allow measuring the performance of emerging heterogeneous computing architectures that consists of both, many core CPUs and accelerators such as GPUs. Intel's x86-based 'Many Integrated Core' (MIC) product "Xeon Phi" is one such architecture, which is developed to enhance the speed, performance and computing capability. Advanced architecture such as Intel's Many Integrated Core has revolutionized the HPC landscape by combining many Intel CPU cores onto a single chip. The paper addresses performance of two Rodinia kernels "LUD" and "HotSpot" when executed in "native mode" i.e. direct execution on Xeon Phi coprocessor and then offloaded by incorporating the offloading directives in the code to mobilize code segments from host (CPU) to Xeon Phi coprocessor. This paper also exhibits the performance of source code of LUD and Hotspot, in terms of execution time measured on Intel Xeon Phi architecture and on CPU as well.