research-article

A Multilevel Computing Architecture for Embedded Multimedia Applications

Authors:

Faraydon Karim,

Tarek AbdelrahmanAuthors Info & Claims

IEEE Micro, Volume 24, Issue 3

Pages 56 - 66

https://doi.org/10.1109/MM.2004.1

Published: 01 May 2004 Publication History

Abstract

This template architecture for SoC systems uses superscalar techniques to exploit task-level parallelism among different processing units. It supports a natural programming model that relieves programmers from explicitly synchronizing tasks and communicating data. Code transformations that improve application performance are easy to incorporate in compilers for this architecture.

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Cited By

Minutoli MCastellana VTumeo ALattuada MFerrandi F(2016)Efficient synthesis of graph methods: A dynamically scheduled architecture2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1145/2966986.2967030(1-8)Online publication date: 7-Nov-2016
https://dl.acm.org/doi/10.1145/2966986.2967030
Castellana VMinutoli MMorari ATumeo ALattuada MFerrandi FMarculescu DLiu F(2015)High Level Synthesis of RDF Queries for Graph AnalyticsProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840865(323-330)Online publication date: 2-Nov-2015
https://dl.acm.org/doi/10.5555/2840819.2840865
Wang CLi XZhang JZhou XNie X(2013)MP-TomasuloACM Transactions on Architecture and Code Optimization10.1145/2459316.245932010:2(1-26)Online publication date: 1-May-2013
https://dl.acm.org/doi/10.1145/2459316.2459320
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Published In

cover image IEEE Micro

IEEE Micro Volume 24, Issue 3

May 2004

68 pages

ISSN:0272-1732

Issue’s Table of Contents

Copyright © 2004.

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 May 2004

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Cited By

Minutoli MCastellana VTumeo ALattuada MFerrandi F(2016)Efficient synthesis of graph methods: A dynamically scheduled architecture2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1145/2966986.2967030(1-8)Online publication date: 7-Nov-2016
https://dl.acm.org/doi/10.1145/2966986.2967030
Castellana VMinutoli MMorari ATumeo ALattuada MFerrandi FMarculescu DLiu F(2015)High Level Synthesis of RDF Queries for Graph AnalyticsProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840865(323-330)Online publication date: 2-Nov-2015
https://dl.acm.org/doi/10.5555/2840819.2840865
Wang CLi XZhang JZhou XNie X(2013)MP-TomasuloACM Transactions on Architecture and Code Optimization10.1145/2459316.245932010:2(1-26)Online publication date: 1-May-2013
https://dl.acm.org/doi/10.1145/2459316.2459320
Aydonat UAbdelrahman T(2010)Parallelization of multimedia applications on the multi-level computing architectureJournal of Embedded Computing10.5555/2598884.25988854:3,4(87-106)Online publication date: 1-Jul-2010
https://dl.acm.org/doi/10.5555/2598884.2598885
Etsion YRamirez ABadia RAyguade ELabarta JValero M(2010)Task superscalarProceedings of the 2nd USENIX conference on Hot topics in parallelism10.5555/1863086.1863102(16-16)Online publication date: 14-Jun-2010
https://dl.acm.org/doi/10.5555/1863086.1863102
Stewart KAbdelrahman T(2007)Automatic task generation for the multi-level computing architectureProceedings of the 19th IASTED International Conference on Parallel and Distributed Computing and Systems10.5555/1647539.1647587(250-259)Online publication date: 6-Nov-2007
https://dl.acm.org/doi/10.5555/1647539.1647587
Paul JMeyer B(2007)Amdahl’s Law Revisited for Single Chip SystemsInternational Journal of Parallel Programming10.1007/s10766-006-0028-835:2(101-123)Online publication date: 1-Apr-2007
https://dl.acm.org/doi/10.1007/s10766-006-0028-8
Cho YZergainoh NYoo SJerraya AChoi K(2007)Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chipDesign Automation for Embedded Systems10.1007/s10617-007-9004-911:2-3(167-191)Online publication date: 1-Sep-2007
https://dl.acm.org/doi/10.1007/s10617-007-9004-9
Abdelkhalek AAbdelrahman T(2006)Locality management using multiple SPMs on the Multi-Level Computing ArchitectureProceedings of the 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia10.5555/1322109.1322127(67-72)Online publication date: 26-Oct-2006
https://dl.acm.org/doi/10.5555/1322109.1322127
Matosevic IAbdelrahman TKarim FMellan AKavi KCytron R(2005)Power optimizations for the MLCA using dynamic voltage scalingProceedings of the 2005 workshop on Software and compilers for embedded systems10.1145/1140389.1140401(109-123)Online publication date: 29-Sep-2005
https://dl.acm.org/doi/10.1145/1140389.1140401
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