opinion

Preserving Virtual Memory by Mitigating the Address Translation Wall

Author:

Abhishek BhattacharjeeAuthors Info & Claims

IEEE Micro, Volume 37, Issue 5

Pages 6 - 10

https://doi.org/10.1109/MM.2017.3711640

Published: 01 September 2017 Publication History

Abstract

The concept of virtual memory is one of the classic computer science abstractions and has long enabled systems that are easy to program and that operate quickly. Today, however, virtual memory faces challenges that pose a threat to the continued progress of computing. This article discusses these threats and presents some promising ways to counter them.

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Cited By

Yao LLi YGuo FWu SXu YLui J(2023)Towards High Performance and Efficient Memory Deduplication via Mixed PagesIEEE Transactions on Computers10.1109/TC.2022.319174272:4(926-940)Online publication date: 1-Apr-2023
https://dl.acm.org/doi/10.1109/TC.2022.3191742
Suchy BGhosh SKersnar DChai SHuang ZNelson ACuevas MBernat AChaudhary GHardavellas NCampanoni SDinda PFalsafi BFerdman MLu SWenisch T(2022)CARAT CAKE: replacing paging via compiler/kernel cooperationProceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3503222.3507771(98-114)Online publication date: 28-Feb-2022
https://dl.acm.org/doi/10.1145/3503222.3507771
Bender MBhattacharjee AConway AFarach-Colton MJohnson RKannan SKuszmaul WMukherjee NPorter DTagliavini GVorobyeva JWest EAgrawal KAzar Y(2021)Paging and the Address-Translation ProblemProceedings of the 33rd ACM Symposium on Parallelism in Algorithms and Architectures10.1145/3409964.3461814(105-117)Online publication date: 6-Jul-2021
https://dl.acm.org/doi/10.1145/3409964.3461814
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Preserving Virtual Memory by Mitigating the Address Translation Wall

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Information

Published In

cover image IEEE Micro

IEEE Micro Volume 37, Issue 5

September/October 2017

68 pages

ISSN:0272-1732

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Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 September 2017

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Cited By

Yao LLi YGuo FWu SXu YLui J(2023)Towards High Performance and Efficient Memory Deduplication via Mixed PagesIEEE Transactions on Computers10.1109/TC.2022.319174272:4(926-940)Online publication date: 1-Apr-2023
https://dl.acm.org/doi/10.1109/TC.2022.3191742
Suchy BGhosh SKersnar DChai SHuang ZNelson ACuevas MBernat AChaudhary GHardavellas NCampanoni SDinda PFalsafi BFerdman MLu SWenisch T(2022)CARAT CAKE: replacing paging via compiler/kernel cooperationProceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3503222.3507771(98-114)Online publication date: 28-Feb-2022
https://dl.acm.org/doi/10.1145/3503222.3507771
Bender MBhattacharjee AConway AFarach-Colton MJohnson RKannan SKuszmaul WMukherjee NPorter DTagliavini GVorobyeva JWest EAgrawal KAzar Y(2021)Paging and the Address-Translation ProblemProceedings of the 33rd ACM Symposium on Parallelism in Algorithms and Architectures10.1145/3409964.3461814(105-117)Online publication date: 6-Jul-2021
https://dl.acm.org/doi/10.1145/3409964.3461814
Baruah TSun YMojumder SAbellán JUkidave YJoshi ARubin NKim JKaeli DSarkar VKim H(2020)ValkyrieProceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques10.1145/3410463.3414639(455-466)Online publication date: 30-Sep-2020
https://dl.acm.org/doi/10.1145/3410463.3414639
Suchy BCampanoni SHardavellas NDinda PDonaldson ATorlak E(2020)CARAT: a case for virtual memory through compiler- and runtime-based address translationProceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/3385412.3385987(329-345)Online publication date: 11-Jun-2020
https://dl.acm.org/doi/10.1145/3385412.3385987
Yan ZLustig DNellans DBhattacharjee AManne SHunter HAltman E(2019)Translation rangerProceedings of the 46th International Symposium on Computer Architecture10.1145/3307650.3322223(698-710)Online publication date: 22-Jun-2019
https://dl.acm.org/doi/10.1145/3307650.3322223

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