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10.1109/RECONFIG.2005.10guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
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An FPGA-Based Coprocessor for the SPHINX Speech Recognition System: Early Experiences

Published: 28 September 2005 Publication History

Abstract

A FPGA based hardware coprocessor for the SPHINX Speech Recognition System is presented. The coprocessor operates at 66MHz and implements a critical part of the Baum-Welch Algorithm to assist in the Gaussian probability calculations, currently with a peak performance of 264 MFlops. Results are presented in comparison with a Xeon 2.66GHz computer and a similar ASIC project, together with guidelines for future development.

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  • (2011)Domain-Specific Optimization of Signal Recognition Targeting FPGAsACM Transactions on Reconfigurable Technology and Systems10.1145/1968502.19685084:2(1-26)Online publication date: 1-May-2011
  • (2009)An FPGA implementation of the local global graph-based voice biometric authentication schemeProceedings of the 16th international conference on Digital Signal Processing10.5555/1700307.1700420(674-680)Online publication date: 5-Jul-2009

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cover image Guide Proceedings
RECONFIG '05: Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) on Reconfigurable Computing and FPGAs
September 2005
ISBN:0769524567

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IEEE Computer Society

United States

Publication History

Published: 28 September 2005

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Cited By

View all
  • (2011)Domain-Specific Optimization of Signal Recognition Targeting FPGAsACM Transactions on Reconfigurable Technology and Systems10.1145/1968502.19685084:2(1-26)Online publication date: 1-May-2011
  • (2009)An FPGA implementation of the local global graph-based voice biometric authentication schemeProceedings of the 16th international conference on Digital Signal Processing10.5555/1700307.1700420(674-680)Online publication date: 5-Jul-2009

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