research-article

Electronic system-level synthesis methodologies

Authors:

Andreas Gerstlauer,

Christian Haubelt,

Andy D. Pimentel,

Todor P. Stefanov,

Daniel D. Gajski,

Jürgen TeichAuthors Info & Claims

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 28, Issue 10

Pages 1517 - 1530

https://doi.org/10.1109/TCAD.2009.2026356

Published: 01 October 2009 Publication History

Abstract

With ever-increasing system complexities, all major semiconductor roadmaps have identified the need for moving to higher levels of abstraction in order to increase productivity in electronic system design. Most recently, many approaches and tools that claim to realize and support a design process at the so-called electronic system level (ESL) have emerged. However, faced with the vast complexity challenges, in most cases at best, only partial solutions are available. In this paper, we develop and propose a novel classification for ESL synthesis tools, and we will present six different academic approaches in this context. Based on these observations, we can identify such common principles and needs as they are leading toward and are ultimately required for a true ESL synthesis solution, covering the whole design process from specification to implementation for complete systems across hardware and software boundaries.

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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Volume 28, Issue 10

October 2009

172 pages

ISSN:0278-0070

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Copyright © 2009.

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IEEE Press

Publication History

Published: 01 October 2009

Revised: 06 June 2009

Received: 24 February 2009

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https://dl.acm.org/doi/10.1145/3647640
Afshari FAbdi A(2024)Qsmix: Q-learning-based task scheduling approach for mixed-critical applications on heterogeneous multi-coresThe Journal of Supercomputing10.1007/s11227-024-06096-880:12(17895-17922)Online publication date: 1-Aug-2024
https://dl.acm.org/doi/10.1007/s11227-024-06096-8
Lovic GYohei I(2023)HDLRuby: A Ruby Extension for Hardware Description and its Translation to Synthesizable Verilog HDLACM Transactions on Embedded Computing Systems10.1145/3581757Online publication date: 1-Feb-2023
https://dl.acm.org/doi/10.1145/3581757
Krishnakumar AOgras UMarculescu RKishinevsky MMudge T(2023)Domain-Specific Architectures: Research Problems and Promising ApproachesACM Transactions on Embedded Computing Systems10.1145/356394622:2(1-26)Online publication date: 24-Jan-2023
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