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View all- Zhao PMcNeely JKuang WWang NWang Z(2018)Design of sequential elements for low power clocking systemIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.203870519:5(914-918)Online publication date: 29-Dec-2018
- Phyu MFu KGoh WYeo K(2018)Power-efficient explicit-pulsed dual-edge triggered sense-amplifier flip-flopsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.202911619:1(1-9)Online publication date: 29-Dec-2018
- Kuwahara MLin Y(2010)Design and verification methods of Toshiba's wireless LAN baseband SoCProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899831(457-463)Online publication date: 18-Jan-2010