article

Express virtual channels: towards the ideal interconnection fabric

Authors:

Niraj K. JhaAuthors Info & Claims

ACM SIGARCH Computer Architecture News, Volume 35, Issue 2

Pages 150 - 161

https://doi.org/10.1145/1273440.1250681

Published: 09 June 2007 Publication History

Abstract

Due to wire delay scalability and bandwidth limitations inherent in shared buses and dedicated links, packet-switched on-chip interconnection networks are fast emerging as the pervasive communication fabric to connect different processing elements in many-core chips. However, current state-of-the-art packet-switched networks rely on complex routers which increases the communication overhead and energy consumption as compared to the ideal interconnection fabric.

In this paper, we try to close the gap between the state-of-the-art packet-switched network and the ideal interconnect by proposing express virtual channels (EVCs), a novel flow control mechanism which allows packets to virtually bypass intermediate routers along their path in a completely non-speculative fashion, thereby lowering the energy/delay towards that of a dedicated wire while simultaneously approaching ideal throughput with a practical design suitable for on-chip networks.

Our evaluation results using a detailed cycle-accurate simulator on a range of synthetic traffic and SPLASH benchmark traces show upto 84% reduction in packet latency and upto 23% improvement in throughput while reducing the average router energy consumption by upto 38% over an existing state-of-the-art packet-switched design. When compared to the ideal interconnect, EVCs add just two cycles to the no-load latency, and are within 14% of the ideal throughput. Moreover, we show that the proposed design incurs a minimal hardware overhead while exhibiting excellent scalability with increasing network sizes.

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Sun COuyang YLiang H(2024)Traffic-oriented reconfigurable NoC with augmented inter-port buffer sharing基于端口间缓冲区共享的流量感知可重构片上网络Frontiers of Information Technology & Electronic Engineering10.1631/FITEE.230045825:10(1322-1336)Online publication date: 16-Aug-2024
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Index Terms

Express virtual channels: towards the ideal interconnection fabric
1. Networks
  1. Network types
    1. Packet-switching networks

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Published In

cover image ACM SIGARCH Computer Architecture News

ACM SIGARCH Computer Architecture News Volume 35, Issue 2

May 2007

527 pages

ISSN:0163-5964

DOI:10.1145/1273440

Issue’s Table of Contents

ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture
June 2007
542 pages
ISBN:9781595937063
DOI:10.1145/1250662
General Chair:
Dean Tullsen
University of California, San Diego
,
Program Chair:
Brad Calder
Microsoft & University of California, San Diego

Copyright © 2007 ACM.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 09 June 2007

Published in SIGARCH Volume 35, Issue 2

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https://doi.org/10.1631/FITEE.2300458
Strikos PEjaz ASourdis I(2024)BZSim: Fast, Large-Scale Microarchitectural Simulation with Detailed Interconnect Modeling2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS61541.2024.00025(167-178)Online publication date: 5-May-2024
https://doi.org/10.1109/ISPASS61541.2024.00025
Shukla PHajikhodaverdian MPavlidis VSalman ECoskun A(2024)Energy-Efficient Dataflow Design for Monolithic 3D Systolic Arrays with Resistive RAM2024 IEEE 15th International Green and Sustainable Computing Conference (IGSC)10.1109/IGSC64514.2024.00022(67-73)Online publication date: 2-Nov-2024
https://doi.org/10.1109/IGSC64514.2024.00022
Jiang FLi CChen LLiu JZhang WXu J(2024)SCNoCs: An Adaptive Heterogeneous Multi-NoC with Selective Compression and Power Gating2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASP-DAC58780.2024.10473870(13-18)Online publication date: 22-Jan-2024
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Shikama YKawano RMatsutani HAmano HNagasaka YFukumoto NKoibuchi M(2022)A traffic-aware memory-cube network using bypassingMicroprocessors & Microsystems10.1016/j.micpro.2022.10447190:COnline publication date: 1-Apr-2022
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Mirhosseini ASadrosadati MSoltani BSarbazi-Azad H(2022)A power-performance balanced network-on-chip for mixed CPU-GPU systemsPower-Efficient Network-on-Chips: Design and Evaluation10.1016/bs.adcom.2021.09.003(45-80)Online publication date: 2022
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