Cited By
View all- Chen ABhat DGehringer E(2015)An extensible simulator for bus- and directory-based cache coherenceProceedings of the Workshop on Computer Architecture Education10.1145/2795122.2795124(1-7)Online publication date: 13-Jun-2015
Animations of important concepts in parallel computer architecture
Pages 23 - 29
Abstract
Resources for teaching parallel computer architecture--specifically, cache coherence and memory consistency--are increasing in importance. Through instructor-created templates, followed by peer-reviewed student work, we have produced a set of animations that can be used for classroom presentation or self-study. These animations cover bus-based coherence protocols, such as MSI, MOESI, and Dragon; and network-based protocols, such as the full bit-vector scheme and a simplified version of SCI. Some animations illustrate the operation of a particular protocol, while others compare protocols against each other. Other animations cover memory-consistency models, such as sequential consistency, processor consistency, weak ordering, and release consistency.
References
[1]
Edward F. Gehringer, "Building resources for teaching computer architecture through electronic peer review," Workshop on Computer Architecture Education, 29th International Symposium on Computer Architecture, San Diego, CA, June 8, 2003.
[2]
Edward F. Gehringer, Luke M. Ehresman, and Dale J. Skrien, "Expertiza: Students Helping to Write an OOD Text", OOPSLA 2006 Educators' Symposium, Portland, OR, October 23, 2006.
[3]
Edward F. Gehringer, Luke M. Ehresman, Susan G. Conger, and Prasad A. Wagle, "Reusable learning objects through peer review: The Expertiza approach," Innovate--Journal of Online Education 3:6 (August/September 2007), to appear.
[4]
David E. Culler, Jaswinder Pal Singh, with Anoop Gupta, Parallel Computer Architecture: A Hardware/Software Approach, © 1999 Morgan-Kauffman, ISBN 1-55860-343-3.
[5]
Tanenbaum, Andrew S., Distributed Operating Systems, Prentice-Hall, 1995.
Index Terms
- Animations of important concepts in parallel computer architecture
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Published: 09 June 2007
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View all- Chen ABhat DGehringer E(2015)An extensible simulator for bus- and directory-based cache coherenceProceedings of the Workshop on Computer Architecture Education10.1145/2795122.2795124(1-7)Online publication date: 13-Jun-2015
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