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Automatic software cache coherence through vectorization

Authors:

John M. Mellor-Crummey,

Ken KennedyAuthors Info & Claims

ICS '92: Proceedings of the 6th international conference on Supercomputing

Pages 129 - 138

https://doi.org/10.1145/143369.143398

Published: 01 August 1992 Publication History

Abstract

Access latency in large-scale shared-memory multiprocessors is a concern since most (if not all) memory is one or more hops away through an interconnection network. Providing processors with one or more levels of cache is an accepted way to reduce the average access latency; however, in a multiprocessor, cached values must be kept coherent for the multiprocessor to support the abstraction of a shared global memory. There is no generally accepted hardware solution to provde cache coherence for large-scale shared-memory multiprocessors. Software coherence strategies offer scalability with current hardware. In this paper we examine a compiler-based software strategy for maintaining cache coherence that relies on dependence analysis and a vectorization algorithm to insert cache control directives. Experiments on the BBN TC2000 for a pair of numerical problems show that the run-time cost of coherence using our strategy is less than that for previously proposed compiler-based software methods and suggest that it should compare favorably with proposed hardware schemes.

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Cited By

Wilkins MWestrick SKandiah VBernat ASuchy BDeiana ECampanoni SAcar UDinda PHardavellas NDubach CBruening DHardekopf B(2023)WARDen: Specializing Cache Coherence for High-Level Parallel LanguagesProceedings of the 21st ACM/IEEE International Symposium on Code Generation and Optimization10.1145/3579990.3580013(122-135)Online publication date: 17-Feb-2023
https://dl.acm.org/doi/10.1145/3579990.3580013
Kim WTavarageri SSadayappan PTorrellas J(2016)Architecting and Programming a Hardware-Incoherent Multiprocessor Cache Hierarchy2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS.2016.76(555-565)Online publication date: May-2016
https://doi.org/10.1109/IPDPS.2016.76
Tavarageri SKim WTorrellas JSadayappan P(2016)Compiler Support for Software Cache Coherence2016 IEEE 23rd International Conference on High Performance Computing (HiPC)10.1109/HiPC.2016.047(341-350)Online publication date: Dec-2016
https://doi.org/10.1109/HiPC.2016.047
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Published In

cover image ACM Conferences

ICS '92: Proceedings of the 6th international conference on Supercomputing

August 1992

495 pages

ISBN:0897914856

DOI:10.1145/143369

Chairmen:
Ken Kennedy
Rice University, Houston, TX
,
Constantine D. Polychronopoulos
Kubota Pacific Computers and CSRD

Copyright © 1992 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 August 1992

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ICS92: ACM SIGARCH International Conference on Supercomputing

July 19 - 24, 1992

D. C., Washington, USA

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Overall Acceptance Rate 629 of 2,180 submissions, 29%

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Cited By

Wilkins MWestrick SKandiah VBernat ASuchy BDeiana ECampanoni SAcar UDinda PHardavellas NDubach CBruening DHardekopf B(2023)WARDen: Specializing Cache Coherence for High-Level Parallel LanguagesProceedings of the 21st ACM/IEEE International Symposium on Code Generation and Optimization10.1145/3579990.3580013(122-135)Online publication date: 17-Feb-2023
https://dl.acm.org/doi/10.1145/3579990.3580013
Kim WTavarageri SSadayappan PTorrellas J(2016)Architecting and Programming a Hardware-Incoherent Multiprocessor Cache Hierarchy2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS.2016.76(555-565)Online publication date: May-2016
https://doi.org/10.1109/IPDPS.2016.76
Tavarageri SKim WTorrellas JSadayappan P(2016)Compiler Support for Software Cache Coherence2016 IEEE 23rd International Conference on High Performance Computing (HiPC)10.1109/HiPC.2016.047(341-350)Online publication date: Dec-2016
https://doi.org/10.1109/HiPC.2016.047
O'Boyle MFord RStohr E(2003)Towards general and exact distributed invalidationJournal of Parallel and Distributed Computing10.1016/j.jpdc.2003.07.00763:11(1123-1137)Online publication date: 1-Nov-2003
https://dl.acm.org/doi/10.1016/j.jpdc.2003.07.007
Ford RO’Boyle MStöhr E(2000)Exact Distributed InvalidationEuro-Par 2000 Parallel Processing10.1007/3-540-44520-X_51(395-404)Online publication date: 18-Aug-2000
https://doi.org/10.1007/3-540-44520-X_51
Choi LYew P(1996)Eliminating Stale Data References through Array Data-Flow AnalysisProceedings of the 10th International Parallel Processing Symposium10.5555/645606.661163(4-13)Online publication date: 15-Apr-1996
https://dl.acm.org/doi/10.5555/645606.661163
Choi LPen-Chung Yew (1996)Eliminating stale data references through array data-flow analysisProceedings of International Conference on Parallel Processing10.1109/IPPS.1996.508032(4-13)Online publication date: 1996
https://doi.org/10.1109/IPPS.1996.508032
Bernstein DBreternitz MGheith AMendelson B(1995)Solutions and debugging for data consistency in multiprocessors with noncoherent cachesInternational Journal of Parallel Programming10.1007/BF0257778523:1(83-103)Online publication date: 1-Feb-1995
https://dl.acm.org/doi/10.1007/BF02577785
Granston EVeidenbaum A(1995)Combining flow and dependence analyses to expose redundant array accessesInternational Journal of Parallel Programming10.1007/BF0257777323:5(423-470)Online publication date: 1-Oct-1995
https://dl.acm.org/doi/10.1007/BF02577773
Li HSevcik KGurd JJalby W(1994)Exploiting cache affinity in software cache coherenceProceedings of the 8th international conference on Supercomputing10.1145/181181.181542(264-273)Online publication date: 16-Jul-1994
https://dl.acm.org/doi/10.1145/181181.181542
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