research-article

Architectural implications of nanoscale integrated sensing and computing

Authors:

Constantin Pistol,

Wutichai Chongchitmate,

Christopher Dwyer,

Alvin R. LebeckAuthors Info & Claims

ASPLOS XIV: Proceedings of the 14th international conference on Architectural support for programming languages and operating systems

Pages 13 - 24

https://doi.org/10.1145/1508244.1508247

Published: 07 March 2009 Publication History

Abstract

This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new computing domains and automate tasks that currently require expert scientific training and costly equipment. This new application domain severely constrains nSP size, which significantly impacts the architectural design space. In this context, we explore nSP architectures and present an nSP design that includes a simple accumulator-based ISA, sensors, limited memory and communication transceivers. To reduce the application memory footprint, we introduce the concept of instruction-fused sensing. We use simulation and analytical models to evaluate nSP designs executing a representative set of target applications. Furthermore, we propose a candidate nSP technology based on optical Resonance Energy Transfer (RET) logic that enables the small size required by the application domain; our smallest design is about the size of the largest known virus. We also show laboratory results that demonstrate initial steps towards a prototype.

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Greenstein S(2017)Moore’s Law and Economic ArchitecturesIEEE Micro10.1109/MM.2017.321111937:4(82-84)Online publication date: 18-Aug-2017
https://dl.acm.org/doi/10.1109/MM.2017.3211119
LaBoda CDwyer CLebeck A(2017)Exploiting Dark Fluorophore States to Implement Resonance Energy Transfer Pre-Charge LogicIEEE Micro10.1109/MM.2017.321111237:4(52-62)Online publication date: 1-Jan-2017
https://dl.acm.org/doi/10.1109/MM.2017.3211112
Herdzik DSandlar HMuszynski JSpirer APatru D(2015)SOAP - Sea of atomic processorsProceedings of the 2015 Sixth International Green and Sustainable Computing Conference (IGSC)10.1109/IGCC.2015.7393684(1-6)Online publication date: 14-Dec-2015
https://dl.acm.org/doi/10.1109/IGCC.2015.7393684
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Index Terms

Architectural implications of nanoscale integrated sensing and computing
1. Computer systems organization
  1. Architectures

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Architectural implications of nanoscale integrated sensing and computing
ASPLOS 2009

This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new computing domains and automate tasks that currently require expert scientific ...
Architectural implications of nanoscale integrated sensing and computing
ASPLOS 2009

This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new computing domains and automate tasks that currently require expert scientific ...
Architectural Implications of Nanoscale-Integrated Sensing and Computing

The authors explore nanoscale sensor processor (nSP) architectures. Their design includes a simple accumulator-based instruction-set architecture, sensors, limited memory, and instruction-fused sensing. Using nSP technology based on optical resonance ...

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cover image ACM Conferences

ASPLOS XIV: Proceedings of the 14th international conference on Architectural support for programming languages and operating systems

March 2009

358 pages

ISBN:9781605584065

DOI:10.1145/1508244

General Chair:
Mary Lou Soffa
University of Virginia, USA
,
Program Chair:
Mary Jane Irwin
Penn State University, USA

ACM SIGPLAN Notices Volume 44, Issue 3
ASPLOS 2009
March 2009
346 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/1508284
Issue’s Table of Contents
ACM SIGARCH Computer Architecture News Volume 37, Issue 1
ASPLOS 2009
March 2009
346 pages
ISSN:0163-5964
DOI:10.1145/2528521
Issue’s Table of Contents

Copyright © 2009 ACM.

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Published: 07 March 2009

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Cited By

Greenstein S(2017)Moore’s Law and Economic ArchitecturesIEEE Micro10.1109/MM.2017.321111937:4(82-84)Online publication date: 18-Aug-2017
https://dl.acm.org/doi/10.1109/MM.2017.3211119
LaBoda CDwyer CLebeck A(2017)Exploiting Dark Fluorophore States to Implement Resonance Energy Transfer Pre-Charge LogicIEEE Micro10.1109/MM.2017.321111237:4(52-62)Online publication date: 1-Jan-2017
https://dl.acm.org/doi/10.1109/MM.2017.3211112
Herdzik DSandlar HMuszynski JSpirer APatru D(2015)SOAP - Sea of atomic processorsProceedings of the 2015 Sixth International Green and Sustainable Computing Conference (IGSC)10.1109/IGCC.2015.7393684(1-6)Online publication date: 14-Dec-2015
https://dl.acm.org/doi/10.1109/IGCC.2015.7393684
Catania VMineo AMonteleone SPatti D(2014)Distributed topology discovery in self-assembled nano network-on-chipComputers and Electrical Engineering10.1016/j.compeleceng.2014.09.00340:8(292-306)Online publication date: 1-Nov-2014
https://dl.acm.org/doi/10.1016/j.compeleceng.2014.09.003
Patti DMineo AMonteleone SCatania V(2014)Topology Discovery in Deadlock Free Self-assembled DNA NetworksModern Trends and Techniques in Computer Science10.1007/978-3-319-06740-7_25(301-311)Online publication date: 6-May-2014
https://doi.org/10.1007/978-3-319-06740-7_25
Catania VMineo AMonteleone SPatti DPalesi MMak TDaneshtalab M(2013)A first effort for a distributed segment-based approach on self-assembled nano networksProceedings of the Sixth International Workshop on Network on Chip Architectures10.1145/2536522.2536532(59-64)Online publication date: 8-Dec-2013
https://dl.acm.org/doi/10.1145/2536522.2536532
Pistol CChongchitmate WDwyer CLebeck A(2010)Architectural Implications of Nanoscale-Integrated Sensing and ComputingIEEE Micro10.1109/MM.2010.930:1(110-120)Online publication date: 1-Jan-2010
https://dl.acm.org/doi/10.1109/MM.2010.9
Patel RParekh R(2019)DNA Based Hybrid Circuit Design Approaches2019 IEEE 5th International Conference for Convergence in Technology (I2CT)10.1109/I2CT45611.2019.9034066(1-6)Online publication date: Mar-2019
https://doi.org/10.1109/I2CT45611.2019.9034066
Yang DLiu HJin HZhang Y(2021)HMvisor: dynamic hybrid memory management for virtual machinesScience China Information Sciences10.1007/s11432-019-2729-564:9Online publication date: 19-Aug-2021
https://doi.org/10.1007/s11432-019-2729-5

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