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A self-adaptive scheduler for asymmetric multi-cores

Authors:

Omer Khan,

Sandip KunduAuthors Info & Claims

GLSVLSI '10: Proceedings of the 20th symposium on Great lakes symposium on VLSI

Pages 397 - 400

https://doi.org/10.1145/1785481.1785573

Published: 16 May 2010 Publication History

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Abstract

Asymmetric chip multiprocessors are imminent in the multi-core era primarily due their potential for power-performance efficiency. In order for software to fully realize this potential, the scheduling of threads to cores must be automated to adapt to the changing program behavior. However, strict system abstraction layers limit the controllability and observability of low level hardware details, thereby, limiting the state-of-the-art systems to rely on manual or static mapping of threads to cores in an asymmetric multi-core. In this paper, we propose a self-adaptive scheduler that exploits program behavior at runtime by matching computational demands of threads to the capabilities of cores. We present a novel empirical model to predict the selection of an appropriate core (based on optimizing throughput, power or performance per watt) for changing program phases within threads. Thread migration is initiated when an optimal mapping of threads to cores is predicted. Results show that our predictive schedulers for the three target optimizations are within 10% of the ideal scheduler.

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Cited By

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Mummidi CKundu S(2023)A Neural Network-Based Approach to Dynamic Core Morphing for AMPs2023 IEEE International Symposium on Smart Electronic Systems (iSES)10.1109/iSES58672.2023.00013(4-9)Online publication date: 18-Dec-2023
https://doi.org/10.1109/iSES58672.2023.00013
da Silva JLeao LPetrucci VGamatie APereira F(2020)Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Inputs2020 X Brazilian Symposium on Computing Systems Engineering (SBESC)10.1109/SBESC51047.2020.9277863(1-8)Online publication date: 24-Nov-2020
https://doi.org/10.1109/SBESC51047.2020.9277863
Sheikh SPasha M(2018)Energy-Efficient Multicore Scheduling for Hard Real-Time SystemsACM Transactions on Embedded Computing Systems10.1145/329138717:6(1-26)Online publication date: 24-Dec-2018
https://dl.acm.org/doi/10.1145/3291387
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A self-adaptive scheduler for asymmetric multi-cores
1. Computer systems organization
  1. Architectures

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Published In

GLSVLSI '10: Proceedings of the 20th symposium on Great lakes symposium on VLSI

May 2010

502 pages

ISBN:9781450300124

DOI:10.1145/1785481

General Chairs:
R. Iris Bahar
Brown University, USA
,
Fabrizio Lombardi
Northeastern University, USA
,
Program Chairs:
David Atienza
EPFL, Switzerland
,
Erik Brunvand
University of Utah, USA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 16 May 2010

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GLSVLSI '10: Great Lakes Symposium on VLSI 2010

May 16 - 18, 2010

Rhode Island, Providence, USA

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

View all

Mummidi CKundu S(2023)A Neural Network-Based Approach to Dynamic Core Morphing for AMPs2023 IEEE International Symposium on Smart Electronic Systems (iSES)10.1109/iSES58672.2023.00013(4-9)Online publication date: 18-Dec-2023
https://doi.org/10.1109/iSES58672.2023.00013
da Silva JLeao LPetrucci VGamatie APereira F(2020)Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Inputs2020 X Brazilian Symposium on Computing Systems Engineering (SBESC)10.1109/SBESC51047.2020.9277863(1-8)Online publication date: 24-Nov-2020
https://doi.org/10.1109/SBESC51047.2020.9277863
Sheikh SPasha M(2018)Energy-Efficient Multicore Scheduling for Hard Real-Time SystemsACM Transactions on Embedded Computing Systems10.1145/329138717:6(1-26)Online publication date: 24-Dec-2018
https://dl.acm.org/doi/10.1145/3291387
Sreelatha JBalachandran SNasre R(2018): Cost Based Hardware Optimization for Asymmetric Multicore ProcessorsIEEE Transactions on Multi-Scale Computing Systems10.1109/TMSCS.2018.27919554:2(163-176)Online publication date: 1-Apr-2018
https://doi.org/10.1109/TMSCS.2018.2791955
Mittal S(2016)A Survey of Techniques for Architecting and Managing Asymmetric Multicore ProcessorsACM Computing Surveys10.1145/285612548:3(1-38)Online publication date: 8-Feb-2016
https://dl.acm.org/doi/10.1145/2856125
Xu YChen XCheng ZSong JZhang Y(2016)Improving Energy Efficiency by Phase-Grained Migration for Asymmetric Multicore2016 IEEE Trustcom/BigDataSE/ISPA10.1109/TrustCom.2016.0222(1412-1419)Online publication date: Aug-2016
https://doi.org/10.1109/TrustCom.2016.0222
Markovic NNemirovsky DUnsal OValero MCristal A(2015)Performance and Energy Efficient Hardware-Based Scheduler for Symmetric/Asymmetric CMPsProceedings of the 2015 27th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)10.1109/SBAC-PAD.2015.14(33-40)Online publication date: 17-Oct-2015
https://dl.acm.org/doi/10.1109/SBAC-PAD.2015.14
Annamalai ARodrigues RKoren IKundu SFensch CO'Boyle MSeznec ABodin F(2013)An opportunistic prediction-based thread scheduling to maximize throughput/watt in AMPsProceedings of the 22nd international conference on Parallel architectures and compilation techniques10.5555/2523721.2523733(63-72)Online publication date: 7-Oct-2013
https://dl.acm.org/doi/10.5555/2523721.2523733
Rodrigues RAnnamalai AKoren IKundu S(2013)Improving performance per watt of asymmetric multi-core processors via online program phase classification and adaptive core morphingACM Transactions on Design Automation of Electronic Systems10.1145/2390191.239019618:1(1-23)Online publication date: 16-Jan-2013
https://dl.acm.org/doi/10.1145/2390191.2390196
Annamalai ARodrigues RKoren IKundu S(2013)A unified view of non-monotonic core selection and application steering in heterogeneous chip multiprocessorsProceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques10.1109/PACT.2013.6618804(133-144)Online publication date: Oct-2013
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