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Is transactional programming actually easier?

Published: 09 January 2010 Publication History

Abstract

Chip multi-processors (CMPs) have become ubiquitous, while tools that ease concurrent programming have not. The promise of increased performance for all applications through ever more parallel hardware requires good tools for concurrent programming, especially for average programmers. Transactional memory (TM) has enjoyed recent interest as a tool that can help programmers program concurrently.
The transactional memory (TM) research community is heavily invested in the claim that programming with transactional memory is easier than alternatives (like locks), but evidence for or against the veracity of this claim is scant. In this paper, we describe a user-study in which 237 undergraduate students in an operating systems course implement the same programs using coarse and fine-grain locks, monitors, and transactions. We surveyed the students after the assignment, and examined their code to determine the types and frequency of programming errors for each synchronization technique. Inexperienced programmers found baroque syntax a barrier to entry for transactional programming. On average, subjective evaluation showed that students found transactions harder to use than coarse-grain locks, but slightly easier to use than fine-grained locks. Detailed examination of synchronization errors in the students' code tells a rather different story. Overwhelmingly, the number and types of programming errors the students made was much lower for transactions than for locks. On a similar programming problem, over 70% of students made errors with fine-grained locking, while less than 10% made errors with transactions.

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Published In

cover image ACM SIGPLAN Notices
ACM SIGPLAN Notices  Volume 45, Issue 5
PPoPP '10
May 2010
346 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/1837853
Issue’s Table of Contents
  • cover image ACM Conferences
    PPoPP '10: Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
    January 2010
    372 pages
    ISBN:9781605588773
    DOI:10.1145/1693453
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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 09 January 2010
Published in SIGPLAN Volume 45, Issue 5

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Author Tags

  1. optimistic concurrency
  2. synchronization
  3. transactional memory

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  • (2023)A parallel programming assessment for stream processing applications on multi-core systemsComputer Standards & Interfaces10.1016/j.csi.2022.10369184:COnline publication date: 1-Mar-2023
  • (2020)GPU Programming Productivity in Different Abstraction ParadigmsACM Transactions on Computing Education10.1145/341830120:4(1-27)Online publication date: 14-Oct-2020
  • (2019)Convoider: A Concurrency Bug Avoider Based on Transparent Software Transactional MemoryInternational Journal of Parallel Programming10.1007/s10766-019-00642-1Online publication date: 12-Sep-2019
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  • (2017)A survey of the double‐fetch vulnerabilitiesConcurrency and Computation: Practice and Experience10.1002/cpe.434530:6Online publication date: 12-Oct-2017
  • (2016)ProteusTMACM SIGARCH Computer Architecture News10.1145/2980024.287238544:2(757-771)Online publication date: 25-Mar-2016
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