Article

Free access

Hardware assists for high performance computing using a mathematics of arrays

Authors:

L. R. Mullin, and

R. ZieglerAuthors Info & Claims

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

February 1995

Pages 39 - 45

https://doi.org/10.1145/201310.201316

Published: 15 February 1995 Publication History

PDF eReader

Abstract

Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmable gate array (FPGA) based reconfigurable coprocessor board (the Chameleon Coprocessor) being used to evaluate hardware architectures for speedup of array computation algorithms. These algorithms are developed using a Mathematics of Arrays (MOA). They provide a means to generate addresses for data transfers that require less data movement than more traditional algorithms. In this manner, the address generation algorithms are acting as an intelligent data prefetching mechanism or special purpose cache controller. Software implementations have been used to provide speedups on the order of 100% over classical methods to the solution of heat transfer equations on a uniprocessor. We extend these methods to application designs for the Chameleon Coprocessor.

References

[1]

Dowd, K., High Performance Computing. O'Reily & Associates, Inc., Sebastopol, CA, first edition, 1993.

Digital Library

Google Scholar

[2]

Mullin, Lenore, "A Mathematics of Arrays", Ph.D. dissertation, Syracuse University, December 1988.

Google Scholar

[3]

Abrams, P.S., "What's wrong with APL", APL 75, ACM, June, 1975.

Digital Library

Google Scholar

[4]

Mullin, L., "The Psi Correspondence Theorem: Array Mapping Using the Psi Calculus", Department of Computer Science, University of Missouri- Rolla.

Google Scholar

[5]

Mullin, L., Thibault, S., "A Reduction semantics for array expressions: the PSI compiler", TR CSC-94-05, March 9, 1994, Department of Computer Science, University of Missouri- Rolla.

Google Scholar

[6]

Coffin, Larry, "Designing a New Programming Methodology for Optimizing Array Accesses in Complex Scientific Problems", OURE Paper, University of Missouri - Rolla, 1994.

Google Scholar

[7]

Xilinx, Inc, 2100 Logic Drive, San Jose, CA 95124 . The Programmable Logic Databook, April 1994.

Google Scholar

[8]

Wo, D., Forward, K., "Compiling to the gate Level for a Reconfigureable Co-Processor", Proceedings of FPGAs for custom computing machines (1994), pp 147-154.

Google Scholar

[9]

Abbott, A., Athanas, P., Chen, L., Elliott, R., "Finding Lines and Building Pyramids with Splash 2", Proceedings of FPGAs for custom computing machines (1994), pp 155-161.

Google Scholar

[10]

Gent, G., Smith, S., Haviland, R., "An FPGA-based Custom Coprocessor for Automatic Image Segmentation Applications", Proceedings of FPGAs for custom computing machines (1994), pp 172-179.

Google Scholar

[11]

Quenot, G., Kraljic, I., Serot, J., Zavidovique B., "A Reconfigureable Compute Engine for Real-Time Vision Automata Prototyiping", Proceedings of FPGAs for custom computing machines (1994), pp 91 - 100.

Google Scholar

[12]

Arnold, J., Duncan, Buell, A., Hoang, D., "The Splash 2 Processor and Applications", Proceedings ICCD '93.

Google Scholar

[13]

Ferguson, W., "Selecting Math Coprocessors", IEEE Spectrum, July 1991, pp 38-41.

Google Scholar

[14]

Bergmann, N., Mudge, J., "Comparing the Performance of FPGA-Based Custom Computers with General -Purpose Computers for DSP Applications", Proceedings of FPGAs for custom computing machines (1994), pp 164-171.

Google Scholar

Cited By

View all

Mullin LRaynolds J(2014)Scalable, Portable, Verifiable Kronecker Products on Multi-scale ComputersConstraint Programming and Decision Making10.1007/978-3-319-04280-0_14(111-129)Online publication date: 2014
https://doi.org/10.1007/978-3-319-04280-0_14
Mullin L(2005)A uniform way of reasoning about array-based computation in radarDigital Signal Processing10.1016/j.dsp.2005.02.00315:5(466-520)Online publication date: 1-Sep-2005
https://dl.acm.org/doi/10.1016/j.dsp.2005.02.003
Raynolds JMullin L(2005)Applications of Conformal Computing techniques to problems in computational physics: the Fast Fourier TransformComputer Physics Communications10.1016/j.cpc.2005.02.004170:1(1-10)Online publication date: Jul-2005
https://doi.org/10.1016/j.cpc.2005.02.004
Show More Cited By

Index Terms

Hardware assists for high performance computing using a mathematics of arrays

Recommendations

Embedded Design Using Programmable Gate Arrays
Read More
Hardware coprocessors for high-performance symmetric cryptography

This work presents two hardware coprocessors for high-performance symmetric cryptographic algorithms. Two algorithms have been implemented, that is, Advanced Encryption Standard Algorithm and International Data Encryption Algorithm, using two different ...
Read More
Elliptic Curve Cryptography hardware accelerator for high-performance secure servers

Security threats affecting electronics communications in the current world make necessary the encryption and authentication of every transaction. The increasing levels of security required are leading to an overload of transaction servers due to ...
Read More

Comments

Information & Contributors

Information

Published In

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

February 1995

174 pages

ISBN:089791743X

DOI:10.1145/201310

Chairmen:
Pak K. Chan
Univ. of California at Santa Cruz, Santa Cruz
,
Jonathan Rose
Univ. of Toronto, Toronto, Ont., Canada

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 February 1995

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Article

Conference

FPGA95

Sponsor:

SIGDA

FPGA95: ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 12 - 14, 1995

California, Monterey, USA

Acceptance Rates

Overall Acceptance Rate 125 of 627 submissions, 20%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

4
Total Citations
View Citations
346
Total Downloads

Downloads (Last 12 months)22
Downloads (Last 6 weeks)8

Other Metrics

View Author Metrics

Citations

Cited By

View all

Mullin LRaynolds J(2014)Scalable, Portable, Verifiable Kronecker Products on Multi-scale ComputersConstraint Programming and Decision Making10.1007/978-3-319-04280-0_14(111-129)Online publication date: 2014
https://doi.org/10.1007/978-3-319-04280-0_14
Mullin L(2005)A uniform way of reasoning about array-based computation in radarDigital Signal Processing10.1016/j.dsp.2005.02.00315:5(466-520)Online publication date: 1-Sep-2005
https://dl.acm.org/doi/10.1016/j.dsp.2005.02.003
Raynolds JMullin L(2005)Applications of Conformal Computing techniques to problems in computational physics: the Fast Fourier TransformComputer Physics Communications10.1016/j.cpc.2005.02.004170:1(1-10)Online publication date: Jul-2005
https://doi.org/10.1016/j.cpc.2005.02.004
Pottinger H(1997)Industrial strength design automation tools in an introductory computer engineering laboratoryProceedings of International Conference on Microelectronic Systems Education10.1109/MSE.1997.612568(105-106)Online publication date: 1997
https://doi.org/10.1109/MSE.1997.612568

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

Embedded Design Using Programmable Gate Arrays

Hardware coprocessors for high-performance symmetric cryptography

Elliptic Curve Cryptography hardware accelerator for high-performance secure servers