research-article

Achieving energy efficiency through runtime partial reconfiguration on reconfigurable systems

Authors:

Richard Neil Pittman,

Alessandro Forin,

Jean-Luc GaudiotAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 12, Issue 3

Article No.: 72, Pages 1 - 21

https://doi.org/10.1145/2442116.2442122

Published: 08 April 2013 Publication History

Abstract

One major advantage of reconfigurable computing systems is their ability to reconfigure hardware at runtime. In this paper, we study the feasibility of achieving energy efficiency in reconfigurable computing systems (e.g., FPGAs) through runtime partial reconfiguration (PR) techniques. In the ideal scenario, we use a hardware accelerator to accelerate certain parts of the program execution; when the accelerator is not active, we use partial reconfiguration to unload it to reduce power consumption. Since the reconfiguration process may introduce a high energy overhead, it is unclear whether this approach is efficient. To approach this problem, we first analytically identify the conditions under which partial reconfiguration can reduce energy consumption. Our results indicate that the key to reduce partial reconfiguration energy overhead is to minimize the time overhead of the reconfiguration process. Based on this analysis, we design and implement a fast reconfiguration engine that achieves close-to-ideal throughput on Xilinx Virtex-4 FPGAs. Our fast reconfiguration engine utilizes a master-slave DMA pair to stream data between the SRAM and the Internal Configuration Access Port (ICAP). We experimentally verify our proposed solutions and compare our design to existing energy reduction techniques, such as clock gating. The results of our study show that by using partial reconfiguration to eliminate the power consumption of the accelerator when it is inactive, we can accelerate program execution and at the same time reduce the overall energy consumption by half.

References

[1]

Becker, J., Hübner, M., Ullmann, M. 2003. Run-time FPGA reconfiguration for power-/cost-optimized real-time systems. In Proceedings of the IFIP International Conference on Very Large Scale Integration.

[2]

Bharadwaj, R. P., Konar, R., Bhatia, D., and Balsara, P. 2005. FPGA architecture for standby power management. In Proceedings of the IEEE International Conference on Field-Programmable Technology.

[3]

Cacti 5.3. 2010. http://quid.hpl.hp.com:9081/cacti/.

[4]

Claus, C., Zhang, B., Stechele, W., Braun, L., Hübner, M., and Becker, J. 2008. A multi-platform controller allowing for maximum dynamic partial reconfiguration throughput. In Proceedings of the IEEE International Conference on Field Programmable Logic and Applications.

[5]

Emmert, J., Stroud, C., Skaggs, B., and Abramovici, M. 2000. Dynamic fault tolerance in FPGAs via partial reconfiguration. In Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines.

Digital Library

[6]

Gayasen, A., Tsai, Y., Vijaykrishnan, N., Kandemir, M., Irwin, M. J., and Tuan, T. 2004. Reducing leakage energy in FPGAs using region-constrained placement. In Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays.

Digital Library

[7]

Heiner, J., Sellers, B., Wirthlin, M., and Kalb, J. 2009. FPGA partial reconfiguration via configuration scrubbing. In Proceedings of the 11th International Workshop on Field-Programmable Logic and Applications.

[8]

Hübner, M., Schuck, C., Kühnle, M., Becker, J. 2006. New 2-dimensional partial dynamic reconfiguration techniques for real-time adaptive microelectronic circuits. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI.

Digital Library

[9]

Koch, D., Beckhoff, C., and Torrison, J. 2010. Fine-grained partial runtime reconfiguration on Virtex-5 FPGAs. In Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines.

Digital Library

[10]

Li, F., Chen, D., He, L., and Cong, J. 2003. Architecture evaluation for power-efficient FPGAs. In Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays.

Digital Library

[11]

Liu, M., Kuehn, W., Lu, Z., and Jantsch, A. 2009. Run-time partial reconfiguration speed investigation and architectural design space exploration. In Proceedings of the IEEE International Conference on Field Programmable Logic and Applications.

[12]

Liu, S., Pittman, R. N., Forin, A., and Gaudiot J.-L. 2010. On energy efficiency of reconfigurable systems with run-time partial reconfiguration. In Proceedings of the 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors.

[13]

Liu, S., Pittman, R. N., Forin, A., and Gaudiot, J.-L. 2011. Minimizing the runtime partial reconfiguration overheads in reconfigurable systems. J. Supercomput.

[14]

Liu, S., Pittman, R. N., and Forin, A. 2009. Minimizing partial reconfiguration overhead with fully streaming DMA engines and Iitelligent ICAP controller. No. MSR-TR-2009-150.

[15]

Noguera, J. and Kennedy, I. O. 2007. Power reduction in network equipment through adaptive partial reconfiguration. In Proceedings of the International Conference on Field Programmable Logic and Applications.

[16]

Osborne, W. G., Luk, W., Coutinho, J. G. F., and Mencer, O. 2009. Energy reduction by systematic run-time reconfigurable hardware deactivation. Trans. HiPEAC, 4, 4.

[17]

Paulsson, K., Hübner, M., Bayar, S., and Becker, J. 2008. Exploitation of run-time partial reconfiguration for dynamic power management in Xilinx Spartan III-based systems. In Proceedings of the International Conference on High-Performance Embedded Architectures and Compilers.

[18]

Paulsson, K., Hübner, M., and Becker, J. 2006. On-line optimization of FPGA power-dissipation by exploiting run-time adaption of communication primitives. In Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design.

Digital Library

[19]

Pittman, R. N., Lynch, N. L., Forin, A. 2006. eMIPS, A Dynamically Extensible Processor, MSR-TR-2006-143, Microsoft Research.

[20]

Pionteck, T., Koch, R., and Albrecht, C. 2006. Applying partial reconfiguration to networks-on-chip. In Proceedings of the International Conference on Field-Programmable Logic and Applications.

[21]

Sezer, S., Heron, J., Woods, R., Turner, R., and Marshall, A. 1998. Fast partial reconfiguration for FCCMs. In Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines.

Digital Library

[22]

Shang, L., Kaviani, S. A. S., Bathala, K. 2002. Dynamic power consumption in Virtex II FPGA family. In Proceedings of the 10th ACM/SIGDA International Symposium on Field Programmable Gate Arrays.

Digital Library

[23]

Telikepalli, A. 2006. Power vs. performance: The 90nm inflection point. Xilinx White Paper 223.

[24]

Tuan, T. and Lai, B. 2003. Leakage power analysis of a 90nm FPGA. In Proceedings of the IEEE Custom Integrated Circuits Conference.

[25]

VIRTEX-4 FPGA USER GUIDE. 2008. http://www.xilinx.com/support/documentation/user_guides/ug070.pdf.

[26]

Wang, Q., Gupta, S., and Anderson. 2009. Clock power reduction for Virtex-5 FPGAs. In Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays.

Digital Library

[27]

Zhang, X., Rabah, H., and Weber, S. 2008. Dynamic slowdown and partial reconfiguration to optimize energy in FPGA based auto-adaptive SoPC. In Proceedings of the 4th IEEE International Symposium on Electronic Design, Test and Applications.

Cited By

Kornaros GLeivadaros SKolimbianakis F(2024)Flexible Updating of Internet of Things Computing Functions through Optimizing Dynamic Partial ReconfigurationACM Transactions on Embedded Computing Systems10.1145/364382523:2(1-25)Online publication date: 1-Feb-2024
https://dl.acm.org/doi/10.1145/3643825
Liu SLi LTang JWu SGaudiot JLiu SLi LTang JWu SGaudiot J(2022)Client Systems for Autonomous DrivingCreating Autonomous Vehicle Systems10.1007/978-3-031-01805-3_8(159-171)Online publication date: 19-Mar-2022
https://doi.org/10.1007/978-3-031-01805-3_8
Liu SLi LTang JWu SGaudiot JLiu SLi LTang JWu SGaudiot J(2022)Client Systems for Autonomous DrivingCreating Autonomous Vehicle Systems10.1007/978-3-031-01802-2_8(155-167)Online publication date: 18-Oct-2022
https://doi.org/10.1007/978-3-031-01802-2_8
Show More Cited By

Index Terms

Achieving energy efficiency through runtime partial reconfiguration on reconfigurable systems

Recommendations

Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing

Runtime Reconfiguration (RTR) has been traditionally utilized as a means for exploiting the flexibility of High-Performance Reconfigurable Computers (HPRCs). However, the RTR feature comes with the cost of high configuration overhead which might ...
Template-based Runtime Reconfiguration Scheduling for Partial Reconfigurable SoC
RTCSA '07: Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications

Reconfigurable hardware provides multiple functions without greatly increasing the die size of SoCs. Field Programmable Gate Array (FPGA), one type of reconfigurable hardware, is developing rapidly to handle high speed and complex applications. In ...
Real-time embedded systems powered by FPGA dynamic partial self-reconfiguration: a case study oriented to biometric recognition applications

This work aims to pave the way for an efficient open system architecture applied to embedded electronic applications to manage the processing of computationally complex algorithms at real-time and low-cost. The target is to define a standard ...

Comments

Information & Contributors

Information

Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 12, Issue 3

March 2013

463 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/2442116

Issue’s Table of Contents

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 08 April 2013

Accepted: 01 September 2011

Revised: 01 March 2011

Received: 01 November 2010

Published in TECS Volume 12, Issue 3

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Research-article
Research
Refereed

Funding Sources

Division of Computing and Communication Foundations

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

17
Total Citations
View Citations
515
Total Downloads

Downloads (Last 12 months)13
Downloads (Last 6 weeks)2

Reflects downloads up to 28 Dec 2024

Other Metrics

View Author Metrics

Citations

Cited By

Kornaros GLeivadaros SKolimbianakis F(2024)Flexible Updating of Internet of Things Computing Functions through Optimizing Dynamic Partial ReconfigurationACM Transactions on Embedded Computing Systems10.1145/364382523:2(1-25)Online publication date: 1-Feb-2024
https://dl.acm.org/doi/10.1145/3643825
Liu SLi LTang JWu SGaudiot JLiu SLi LTang JWu SGaudiot J(2022)Client Systems for Autonomous DrivingCreating Autonomous Vehicle Systems10.1007/978-3-031-01805-3_8(159-171)Online publication date: 19-Mar-2022
https://doi.org/10.1007/978-3-031-01805-3_8
Liu SLi LTang JWu SGaudiot JLiu SLi LTang JWu SGaudiot J(2022)Client Systems for Autonomous DrivingCreating Autonomous Vehicle Systems10.1007/978-3-031-01802-2_8(155-167)Online publication date: 18-Oct-2022
https://doi.org/10.1007/978-3-031-01802-2_8
Wan ZYu BLi TTang JZhu YWang YRaychowdhury ALiu S(2021)A Survey of FPGA-Based Robotic ComputingIEEE Circuits and Systems Magazine10.1109/MCAS.2021.307160921:2(48-74)Online publication date: Oct-2022
https://doi.org/10.1109/MCAS.2021.3071609
Si QRashid ICarrion Schafer B(2021)Micro-architecture Tuning for Dynamic Frequency Scaling in Coarse-Grain Runtime Reconfigurable Arrays with Adaptive Clock Domain Support2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI51109.2021.00047(212-217)Online publication date: Jul-2021
https://doi.org/10.1109/ISVLSI51109.2021.00047
Chen JZaman MMakris YBlanton RMitra SSchafer BLi Z(2020)DECOYProceedings of the 57th ACM/EDAC/IEEE Design Automation Conference10.5555/3437539.3437545(1-6)Online publication date: 20-Jul-2020
https://dl.acm.org/doi/10.5555/3437539.3437545
Liu SLi LTang JWu SGaudiot J(2020)Creating Autonomous Vehicle Systems, Second EditionSynthesis Lectures on Computer Science10.2200/S01036ED1V01Y202007CSL0128:2(i-216)Online publication date: 9-Sep-2020
https://doi.org/10.2200/S01036ED1V01Y202007CSL012
Yu BHu WXu LTang JLiu SZhu Y(2020)Building the Computing System for Autonomous Micromobility Vehicles: Design Constraints and Architectural Optimizations2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO50266.2020.00089(1067-1081)Online publication date: Oct-2020
https://doi.org/10.1109/MICRO50266.2020.00089
Alkamil APerera D(2020)Towards Dynamic and Partial Reconfigurable Hardware Architectures for Cryptographic Algorithms on Embedded DevicesIEEE Access10.1109/ACCESS.2020.30437508(221720-221742)Online publication date: 2020
https://doi.org/10.1109/ACCESS.2020.3043750
Hu BTian JShihab MReddy GSwartz WMakris YSchaefer BSechen CHomayoun HTaskin BMohsenin TZhao W(2019)Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGAProceedings of the 2019 Great Lakes Symposium on VLSI10.1145/3299874.3317992(171-176)Online publication date: 13-May-2019
https://dl.acm.org/doi/10.1145/3299874.3317992
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Article

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Issue’s Table of Contents