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OMP: a RISC-based multiprocessor using orthogonal-access memories and multiple spanning buses

Authors:

S. Mehrotra, and

C. M. ChengAuthors Info & Claims

ACM SIGARCH Computer Architecture News, Volume 18, Issue 3b

Pages 7 - 22

https://doi.org/10.1145/255129.255133

Published: 01 June 1990 Publication History

Abstract

This paper presents the architectural design and RISC based implementation of a prototype supercomputer, namely the Orthogonal MultiProcessor (OMP). The OMP system is constructed with 16 Intel 1860 RISC microprocessors and 256 parallel memory modules, which are 2-D interleaved and orthogonally accessed using custom-designed spanning buses. The architectural design has been validated by a CSIM-based multiprocessor simulator. The design choices are based on worst-case delay analysis and simulation validation. The current OMP prototype chooses a 2-dimensional memory architecture, mainly for image processing, computer vision, and neural network simulation applications. The 16-processor OMP prototype is targeted to achieve a peak performance of 400 RISC integer MIPS or a maximum of 640 Mflops. This paper presents the architectural design of the OMP prototype at system and PC board levels. We are presently entering the fabrication stage of all the PC boards. The system is expected to become operational in late 1991 and benchmarking results will be available in 1992. Only hardware design features are reported here. Software and simulation results are reported elsewhere.

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Cited By

Harvey DKshirsagar SHobson C(2001)Low cost scaleable parallel image processing systemMicroprocessors and Microsystems10.1016/S0141-9331(01)00107-725:3(143-157)Online publication date: May-2001
https://doi.org/10.1016/S0141-9331(01)00107-7
Chlebus BCzumaj AGąsieniec LKowaluk MPlandowski W(2000)Algorithms for the parallel alternating direction access machineTheoretical Computer Science10.1016/S0304-3975(99)00280-7245:2(151-173)Online publication date: 28-Aug-2000
https://dl.acm.org/doi/10.1016/S0304-3975%2899%2900280-7
Yu QZhang MYu LWang RXiao J(2022)SAR Image Change Detection Based on Joint Dictionary Learning With Iterative Adaptive Threshold OptimizationIEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing10.1109/JSTARS.2022.318710815(5234-5249)Online publication date: 2022
https://doi.org/10.1109/JSTARS.2022.3187108
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OMP: a RISC-based multiprocessor using orthogonal-access memories and multiple spanning buses

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Published In

cover image ACM SIGARCH Computer Architecture News

ACM SIGARCH Computer Architecture News Volume 18, Issue 3b

Special Issue: Proceedings of the 4th international conference on Supercomputing

Sept. 1990

489 pages

ISSN:0163-5964

DOI:10.1145/255129

Chairmen:
Ahmed Sameh
Univ. of Illinois at Urbana-Champaign, Urbana
,
Henk van der Vorst
Delft Univ. of Technology and CWI, The Netherlands

Issue’s Table of Contents

ICS '90: Proceedings of the 4th international conference on Supercomputing
June 1990
492 pages
ISBN:0897913698
DOI:10.1145/77726
Chairmen:
Ahmed Sameh
Univ. of Illinois
,
Henk van der Vorst
Delft Univ. of Technology and CWI, The Netherlands

Copyright © 1990 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 1990

Published in SIGARCH Volume 18, Issue 3b

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Cited By

Harvey DKshirsagar SHobson C(2001)Low cost scaleable parallel image processing systemMicroprocessors and Microsystems10.1016/S0141-9331(01)00107-725:3(143-157)Online publication date: May-2001
https://doi.org/10.1016/S0141-9331(01)00107-7
Chlebus BCzumaj AGąsieniec LKowaluk MPlandowski W(2000)Algorithms for the parallel alternating direction access machineTheoretical Computer Science10.1016/S0304-3975(99)00280-7245:2(151-173)Online publication date: 28-Aug-2000
https://dl.acm.org/doi/10.1016/S0304-3975%2899%2900280-7
Yu QZhang MYu LWang RXiao J(2022)SAR Image Change Detection Based on Joint Dictionary Learning With Iterative Adaptive Threshold OptimizationIEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing10.1109/JSTARS.2022.318710815(5234-5249)Online publication date: 2022
https://doi.org/10.1109/JSTARS.2022.3187108
Rudolph L(2005)Hardware support for collective communication operationsParallel Architectures and Their Efficient Use10.1007/3-540-56731-3_11(110-118)Online publication date: 28-May-2005
https://doi.org/10.1007/3-540-56731-3_11
Haralick RSomani AWittenbrink CJohnson RCooper KShapiro LPhillips IHwang JCheung WYao YChen CYang LDaugherty BLorbeski BLoving KMiller TParkins LSoos S(1995)ProteusMachine Vision and Applications10.1007/BF012134748:2(85-100)Online publication date: 1-Feb-1995
https://dl.acm.org/doi/10.1007/BF01213474
Lee SHsu W(1993)Parallel implementation of prime-factor discrete cosine transform on the orthogonal multiprocessorIEEE Transactions on Circuits and Systems for Video Technology10.1109/76.2127173:2(107-115)Online publication date: 1-Apr-1993
https://dl.acm.org/doi/10.1109/76.212717
Haralick RSomani AWittenbrink CJohnson RCooper KShapiro LPhillips IHwang JCheung WYao YChen CYang LDaugherty BLorbeski BLoving KMiller TParkins LSoos S(1992)Proteus: a reconfigurable computational network for computer visionProceedings., 11th IAPR International Conference on Pattern Recognition. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition,10.1109/ICPR.1992.202128(43-54)Online publication date: 1992
https://doi.org/10.1109/ICPR.1992.202128
Anderson MYesberg JYakovleff AKrnak DDrewer PWatson CCavaiuolo M(1992)A heterogeneous parallel accelerator for image analysis and radar signal processingProceedings of the Twenty-Fifth Hawaii International Conference on System Sciences10.1109/HICSS.1992.183155(129-138 vol.1)Online publication date: 1992
https://doi.org/10.1109/HICSS.1992.183155
Alnuweiri HPrasanna V(1992)Parallel Architectures and Algorithms for Image Component LabelingIEEE Transactions on Pattern Analysis and Machine Intelligence10.1109/34.15990414:10(1014-1034)Online publication date: 1-Oct-1992
https://dl.acm.org/doi/10.1109/34.159904
Shing HNi LElliott R(1991)A conflict-free memory design for multiprocessorsProceedings of the 1991 ACM/IEEE conference on Supercomputing10.1145/125826.125868(46-55)Online publication date: 1-Aug-1991
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