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A hardware/software partitioner using a dynamically determined granularity

Authors:

Rolf ErnstAuthors Info & Claims

DAC '97: Proceedings of the 34th annual Design Automation Conference

Pages 691 - 696

https://doi.org/10.1145/266021.266323

Published: 13 June 1997 Publication History

Abstract

Computer aided hardware/software partitioning is one of the keychallenges in hardware/software co-design. While previous approacheshave used a fixed granularity, i.e. the size of the partitioningobjects was fixed, we present a partitioning approach thatdynamically determines the partitioning granularity to adapt optimizationsteps to application properties and to intermediate optimizationresults. Experiments with simulated annealing optimizationshow a faster convergence and far better adaptability to costfunction variations than in previous experiments with fixed granularity.

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Cited By

Jemai MOuni B(2015)Hardware software partitioning of control data flow graph on system on programmable chipMicroprocessors & Microsystems10.1016/j.micpro.2015.04.00639:4(259-270)Online publication date: 1-Jun-2015
https://dl.acm.org/doi/10.1016/j.micpro.2015.04.006
Parthasarathy TVenkatakrishnan NBalamurugan K(2012)Analysis of partitioning between ARM and FPGA on performance characteristics2012 IEEE International Conference on Advanced Communication Control and Computing Technologies (ICACCCT)10.1109/ICACCCT.2012.6320745(78-82)Online publication date: Aug-2012
https://doi.org/10.1109/ICACCCT.2012.6320745
Mahadevan SGopinath VLysecky RSprinkle JRozenblit JMarcellin M(2011)Hardware/Software Communication Middleware for Data Adaptable Embedded SystemsProceedings of the 2011 18th IEEE International Conference and Workshops on Engineering of Computer-Based Systems10.1109/ECBS.2011.12(34-43)Online publication date: 27-Apr-2011
https://dl.acm.org/doi/10.1109/ECBS.2011.12
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A hardware/software partitioner using a dynamically determined granularity

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Published In

cover image ACM Conferences

DAC '97: Proceedings of the 34th annual Design Automation Conference

June 1997

788 pages

ISBN:0897919203

DOI:10.1145/266021

Chairmen:
Ellen J. Yoffa
IBM T. J. Watson Research Center, Yorktown Heights, NY
,
Giovanni De Micheli
Stanford Univ., Stanford, CA
,
Jan M. Rabaey
Univ. of California, Berkeley

Copyright © 1997 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS: Circuits & Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 13 June 1997

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DAC97: The 34th Design Automation Conference

June 9 - 13, 1997

California, Anaheim, USA

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DAC '97 Paper Acceptance Rate 139 of 400 submissions, 35%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Jemai MOuni B(2015)Hardware software partitioning of control data flow graph on system on programmable chipMicroprocessors & Microsystems10.1016/j.micpro.2015.04.00639:4(259-270)Online publication date: 1-Jun-2015
Parthasarathy TVenkatakrishnan NBalamurugan K(2012)Analysis of partitioning between ARM and FPGA on performance characteristics2012 IEEE International Conference on Advanced Communication Control and Computing Technologies (ICACCCT)10.1109/ICACCCT.2012.6320745(78-82)Online publication date: Aug-2012
Mahadevan SGopinath VLysecky RSprinkle JRozenblit JMarcellin M(2011)Hardware/Software Communication Middleware for Data Adaptable Embedded SystemsProceedings of the 2011 18th IEEE International Conference and Workshops on Engineering of Computer-Based Systems10.1109/ECBS.2011.12(34-43)Online publication date: 27-Apr-2011
Lysecky RVahid F(2009)Design and implementation of a MicroBlaze-based warp processorACM Transactions on Embedded Computing Systems10.1145/1509288.15092948:3(1-22)Online publication date: 22-Apr-2009
Buker MMetzner AStierand I(2009)Testing real-time task networks with functional extensions using model-checking2009 IEEE Conference on Emerging Technologies & Factory Automation10.1109/ETFA.2009.5347060(1-10)Online publication date: Sep-2009
Lysecky R(2008)Scalability and parallel execution of warp processingInternational Journal of Parallel Programming10.5555/1515858.151586136:5(478-492)Online publication date: 1-Oct-2008
Lysecky R(2008)Scalability and Parallel Execution of Warp Processing: Dynamic Hardware/Software PartitioningInternational Journal of Parallel Programming10.1007/s10766-008-0079-036:5(478-492)Online publication date: 19-Sep-2008
Zhu CGu ZDick RShang LHa SChoi KDutt NTeich J(2007)Reliable multiprocessor system-on-chip synthesisProceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis10.1145/1289816.1289874(239-244)Online publication date: 30-Sep-2007
Hauck SDeHon A(2007)Reconfigurable ComputingundefinedOnline publication date: 2-Nov-2007
Lin THung YChang R(2006)Efficient Hardware/Software Partitioning Approach for Embedded Multiprocessor Systems2006 International Symposium on VLSI Design, Automation and Test10.1109/VDAT.2006.258167(1-4)Online publication date: Dec-2006
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