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A graph-based iterative compiler pass selection and phase ordering approach

Published: 13 June 2016 Publication History

Abstract

Nowadays compilers include tens or hundreds of optimization passes, which makes it difficult to find sequences of optimizations that achieve compiled code more optimized than the one obtained using typical compiler options such as -O2 and -O3. The problem involves both the selection of the compiler passes to use and their ordering in the compilation pipeline. The improvement achieved by the use of custom phase orders for each function can be significant, and thus important to satisfy strict requirements such as the ones present in high-performance embedded computing systems. In this paper we present a new and fast iterative approach to the phase selection and ordering challenges resulting in compiled code with higher performance than the one achieved with the standard optimization levels of the LLVM compiler. The obtained performance improvements are comparable with the ones achieved by other iterative approaches while requiring considerably less time and resources. Our approach is based on sampling over a graph representing transitions between compiler passes. We performed a number of experiments targeting the LEON3 microarchitecture using the Clang/LLVM 3.7 compiler, considering 140 LLVM passes and a set of 42 representative signal and image processing C functions. An exhaustive cross-validation shows our new exploration method is able to achieve a geometric mean performance speedup of 1.28x over the best individually selected -OX flag when considering 100,000 iterations; versus geometric mean speedups from 1.16x to 1.25x obtained with state-of-the-art iterative methods not using the graph. From the set of exploration methods tested, our new method is the only one consistently finding compiler sequences that result in performance improvements when considering 100 or less exploration iterations. Specifically, it achieved geometric mean speedups of 1.08x and 1.16x for 10 and 100 iterations, respectively.

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  1. A graph-based iterative compiler pass selection and phase ordering approach

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    cover image ACM Conferences
    LCTES 2016: Proceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools, and Theory for Embedded Systems
    June 2016
    122 pages
    ISBN:9781450343169
    DOI:10.1145/2907950
    • cover image ACM SIGPLAN Notices
      ACM SIGPLAN Notices  Volume 51, Issue 5
      LCTES '16
      May 2016
      122 pages
      ISSN:0362-1340
      EISSN:1558-1160
      DOI:10.1145/2980930
      • Editor:
      • Andy Gill
      Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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    Published: 13 June 2016

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    Author Tags

    1. Phase-ordering
    2. compilers
    3. design space exploration

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    • (2022)CompilerGymProceedings of the 20th IEEE/ACM International Symposium on Code Generation and Optimization10.1109/CGO53902.2022.9741258(92-105)Online publication date: 2-Apr-2022
    • (2020)CodeSeerProceedings of the 34th ACM International Conference on Supercomputing10.1145/3392717.3392741(1-11)Online publication date: 29-Jun-2020
    • (2020)A Collaborative Filtering Approach for the Automatic Tuning of Compiler OptimisationsThe 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems10.1145/3372799.3394361(15-25)Online publication date: 16-Jun-2020
    • (2020)High-Reliability Compilation Optimization Sequence Generation Framework Based ANN2020 IEEE 20th International Conference on Software Quality, Reliability and Security (QRS)10.1109/QRS51102.2020.00053(347-355)Online publication date: Dec-2020
    • (2019)A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis FlowsACM Transactions on Reconfigurable Technology and Systems10.1145/335647512:4(1-26)Online publication date: 31-Oct-2019
    • (2019)FuncyTunerProceedings of the 48th International Conference on Parallel Processing10.1145/3337821.3337842(1-10)Online publication date: 5-Aug-2019
    • (2018)Neural code comprehensionProceedings of the 32nd International Conference on Neural Information Processing Systems10.5555/3327144.3327276(3589-3601)Online publication date: 3-Dec-2018
    • (2018)Autotuning and adaptivity in energy efficient HPC systemsProceedings of the 15th ACM International Conference on Computing Frontiers10.1145/3203217.3205338(270-275)Online publication date: 8-May-2018
    • (2018)A Survey on Compiler Autotuning using Machine LearningACM Computing Surveys10.1145/319797851:5(1-42)Online publication date: 18-Sep-2018
    • (2018)Machine Learning in Compiler OptimizationProceedings of the IEEE10.1109/JPROC.2018.2817118106:11(1879-1901)Online publication date: Nov-2018
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