research-article

Redesign the Memory Allocator for Non-Volatile Main Memory

Authors:

Wei ChenAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 13, Issue 3

Article No.: 49, Pages 1 - 26

https://doi.org/10.1145/2997651

Published: 14 April 2017 Publication History

Abstract

The non-volatile memory (NVM) has the merits of byte-addressability, fast speed, persistency and low power consumption, which make it attractive to be used as main memory. Commonly, user process dynamically acquires memory through memory allocators. However, traditional memory allocators designed with in-place data writes are not appropriate for the non-volatile main memory (NVRAM) due to the limited endurance. In this article, first, we quantitatively analyze the wear-oblivious of DRAM-oriented designed allocator—glibc malloc and the inefficiency of wear-conscious allocator NVMalloc. Then, we propose WAlloc, an efficient wear-aware manual memory allocator designed for NVRAM: (1) decouples metadata and data management; (2) distinguishes metadata with volatility; (3) redirects the data writes around to achieve wear-leveling; (4) redesigns an efficient and effective NVM copy mechanism, bypassing the CPU cache partially and prefetching data explicitly. Finally, experimental results show that the wear-leveling of WAlloc outperforms that of NVMalloc about 30% and 60% under random workloads and well-distributed workloads, respectively. Besides, WAlloc reduces the average data memory writes in 64 bytes block by 1.5 times comparing with glibc malloc. With the fulfillment of data persistency, cache bypassing NVM copy is better than cache line flushing NVM copy with performance improvement circa 14%.

References

[1]

Berk Atikoglu, Yuehai Xu, Eitan Frachtenberg, Song Jiang, and Mike Paleczny. 2012. Workload analysis of a large-scale key-value store. ACM SIGMETRICS Perform. Eval. Rev. 40, 1, 53--64.

Digital Library

[2]

Luiz André Barroso, Jimmy Clidaras, and Urs Hölzle. 2013. The datacenter as a computer: An introduction to the design of warehouse-scale machines. Synth. Lect. Comput. Architect. 8, 3, 1--154.

[3]

Bill Blunden. 2003. Memory Management: Algorithms and Implementation in C/C++. Wordware Publishing.

[4]

Hung-Sheng Chang, Yuan-Hao Chang, Pi-Cheng Hsiu, Tei-Wei Kuo, and Hsiang-Pang Li. 2015. Marching-based wear-leveling for PCM-based storage systems. ACM Trans. Des. Automat. Electron. Syst. (TODAES) 20, 2, 25.

Digital Library

[5]

Li-Pin Chang and Li-Chun Huang. 2011. A low-cost wear-leveling algorithm for block-mapping solid-state disks. SIGPLAN Not. 46, 5, 31--40.

Digital Library

[6]

Yuan-Hao Chang, Hsieh Jen-Wei, and Kuo Tei-Wei. 2007. Endurance enhancement of flash-memory storage systems: An efficient static wear leveling design. In Proceedings of the 2007 44th ACM/IEEE Design Automation Conference (DAC). ACM, 212--217.

Digital Library

[7]

Feng Chen, Michael P. Mesnier, and Scott Hahn. 2014. A protected block device for persistent memory. In Proceedings of the 2014 30th Symposium on Mass Storage Systems and Technologies (MSST). IEEE, 1--12.

[8]

Shimin Chen and Qin Jin. 2015. Persistent b+-trees in non-volatile main memory. In Proceedings of the VLDB Endowment, 8, 7, 786--797.

Digital Library

[9]

Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laura M. Grupp, Rajesh K. Gupta, Ranjit Jhala, and Steven Swanson. 2011. NV-Heaps: Making persistent objects fast and safe with next-generation, non-volatile memories. ACM SIGARCH Comput. Architect. News 39, 1, 105--118.

Digital Library

[10]

Jeremy Condit, Edmund B. Nightingale, Christopher Frost, Engin Ipek, Benjamin Lee, Doug Burger, and Derrick Coetzee. 2009. Better I/O through byte-addressable, persistent memory. In Proceedings of the ACM SIGOPS 22nd Symposium on Operating Systems Principles. ACM, 133--146.

Digital Library

[11]

Brian F. Cooper, Adam Silberstein, Erwin Tam, Raghu Ramakrishnan, and Russell Sears. 2010. Benchmarking cloud serving systems with YCSB. In Proceedings of the 1st ACM Symposium on Cloud Computing. ACM, 143--154.

Digital Library

[12]

B. Dieny, R. Sousa, G. Prenat, and U. Ebels. 2008. Spin-dependent phenomena and their implementation in spintronic devices. In Proceedings of the International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA 2008). IEEE, 70--71.

[13]

Subramanya R. Dulloor, Sanjay Kumar, Anil Keshavamurthy, Philip Lantz, Dheeraj Reddy, Rajesh Sankaran, and Jeff Jackson. 2014. System software for persistent memory. In Proceedings of the 9th European Conference on Computer Systems. ACM, 15.

Digital Library

[14]

Alexandre P. Ferreira, Miao Zhou, Santiago Bock, Bruce Childers, Rami Melhem, and Daniel Mossé. 2010. Increasing PCM main memory lifetime. In Proceedings of the Conference on Design, Automation and Test in Europe. European Design and Automation Association, 914--919.

Digital Library

[15]

Yenpo Ho, Garng M. Huang, and Peng Li. 2009. Nonvolatile memristor memory: Device characteristics and design implications. In Proceedings of the 2009 International Conference on Computer-Aided Design. ACM, 485--490.

Digital Library

[16]

Jingtong Hu, Wei-Che Tseng, Chun Jason Xue, Qingfeng Zhuge, Yingchao Zhao, and Edwin H. M. Sha. 2011. Write activity minimization for nonvolatile main memory via scheduling and recomputation. IEEE Trans. Comput.-Aided Des. Integrat. Circ. Syst. 30, 4, 584--592.

Digital Library

[17]

Jingtong Hu, Chun Jason Xue, Wei-Che Tseng, Yi He, Meikang Qiu, and Edwin H. M. Sha. 2010. Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation. In Proceedings of the 2010 47th ACM/IEEE Design Automation Conference (DAC). ACM/IEEE, 350--355.

Digital Library

[18]

Jingtong Hu, Qingfeng Zhuge, Chun Jason Xue, Wei-Che Tseng, and Edwin H. M. Sha. 2013. Software enabled wear-leveling for hybrid PCM main memory on embedded systems. In Proceedings of the Design, Automation 8 Test in Europe Conference 8 Exhibition (DATE 2013). IEEE, 599--602.

[19]

Soojun Im and Dongkun Shin. 2014. Differentiated space allocation for wear leveling on phase-change memory-based storage device. IEEE Trans. Consum. Electron. 60, 1, 45--51.

[20]

Jaeyong Jeong, Sangwook Shane Hahn, Sungjin Lee, and Jihong Kim. 2014. Lifetime improvement of NAND flash-based storage systems using dynamic program and erase scaling. In Proceedings of FAST 2014. 61--74.

[21]

Lei Jiang, Bo Zhao, Youtao Zhang, Jun Yang, and Bruce R. Childers. 2012. Improving write operations in MLC phase change memory. In Proceedings of the 2012 IEEE 18^th International Symposium on High Performance Computer Architecture (HPCA). IEEE, 1--10.

Digital Library

[22]

Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger. 2009. Architecting phase change memory as a scalable DRAM alternative. In Proceedings of ISCA. ACM, New York, 2--13.

Digital Library

[23]

Charles Lefurgy, Karthick Rajamani, Freeman Rawson, Wes Felter, Michael Kistler, and Tom W. Keller. 2003. Energy management for commercial servers. Computer 36, 12, 39--48.

Digital Library

[24]

Qingan Li, Yanxiang He, Yong Chen, Chun Jason Xue, Nan Jiang, and Chao Xu. 2014. A wear-leveling-aware dynamic stack for PCM memory in embedded systems. In Proceedings of the Conference on Design, Automation 8 Test in Europe, 89. European Design and Automation Association.

[25]

Xu Li, Kai Lu, and Xu Zhou. 2012a. NV-TS: A fault tolerance transaction system based on persistent memory. In Proceedings of the 2012 International Conference on Computer Science and Electronics Engineering (ICCSEE). IEEE, 2, 221--224.

Digital Library

[26]

Xu Li, Kai Lu, Xiaoping Wang, and Xu Zhou. 2012b. NV-process: A fault-tolerance process model based on non-volatile memory. In Proceedings of the Asia-Pacific Workshop on Systems. ACM, 1.

Digital Library

[27]

Duo Liu, Tianzheng Wang, Yi Wang, Zili Shao, Qingfeng Zhuge, and Edwin Sha. 2013. Curling-PCM: Application-specific wear leveling for phase change memory based embedded systems. In Proceedings of the 2013 18^th Asia and South Pacific Design Automation Conference (ASP-DAC). IEEE, 279--284.

[28]

Chi-Keung Luk, Robert Cohn, Robert Muth, Harish Patil, Artur Klauser, Geoff Lowney, Steven Wallace, Vijay Janapa Reddi, and Kim Hazelwood. 2005. Pin: Building customized program analysis tools with dynamic instrumentation. In ACM SIGPLAN Not. 40, 6, 190--200.

Digital Library

[29]

Jack A. Mandelman, Robert H. Dennard, Gary B. Bronner, John K. DeBrosse, Rama Divakaruni, Yujun Li, and Carl J. Radens. 2002. Challenges and future directions for the scaling of dynamic random-access memory (DRAM). IBM J. Res. Develop. 46, 2.3, 187--212.

Digital Library

[30]

Iulian Moraru, David G. Andersen, Michael Kaminsky, Niraj Tolia, Parthasarathy Ranganathan, and Nathan Binkert. 2013. Consistent, durable, and safe memory management for byte-addressable non volatile main memory. In Proceedings of the 1st ACM SIGOPS Conference on Timely Results in Operating Systems. ACM.

Digital Library

[31]

W. Mueller, G. Aichmayr, W. Bergner, E. Erben, T. Hecht, C. Kapteyn, A. Kersch, S. Kudelka, F. Lau, J. Luetzen, and A. Orth. 2005. (December). Challenges for the DRAM cell scaling to 40nm. In Proceedings of the IEEE International Electron Devices Meeting. (IEDM Technical Digest.)

[32]

Moinuddin K. Qureshi, John Karidis, Michele Franceschini, Vijayalakshmi Srinivasan, Luis Lastras, and Bulent Abali. 2009. Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture. ACM, 14--23.

Digital Library

[33]

Moinuddin K. Qureshi, Andre Seznec, Luis A. Lastras, and Michele M. Franceschini. 2011. Practical and secure PCM systems by online detection of malicious write streams. In Proceedings of the 2011 IEEE 17th International Symposium on High Performance Computer Architecture (HPCA). IEEE, 478--489.

[34]

Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, and Jude A. Rivers. 2009. Scalable high performance main memory system using phase-change memory technology. In Proceedings of ISCA. ACM, New York, 24--33.

Digital Library

[35]

Simone Raoux, Geoffrey W. Burr, Matthew J. Breitwisch, Charles T. Rettner, Y. C. Chen, Robert M. Shelby, Martin Salinga, Daniel Krebs, S. H. Chen, H. L. Lung, and C. H. Lam. 2008. Phase-change random access memory: A scalable technology. IBM J. Res. Develop. 52, 4.5, 465--479.

Digital Library

[36]

R. Rodríguez-Rodríguez, F. Castro, D. Chaver, R. Gonzalez-Alberquilla, L. Piñuel, and F. Tirado. 2015. Write-aware replacement policies for PCM-based systems. The Computer J. 58, 9, 2000--2025.

[37]

Stephen M. Rumble, Ankita Kejriwal, and John Ousterhout. 2014. Log-structured memory for dram-based storage. In Proceedings of the 12th USENIX Conference on File and Storage Technologies (FAST'14). 1--16.

Digital Library

[38]

Andre Seznec. 2010. A phase change memory as a secure main memory. Comput. Architect. Lett. 9, 1, 5--8.

Digital Library

[39]

Zili Shao, Naehyuck Chang, and Nikil Dutt. 2012. (August). PTL: PCM translation layer. In VLSI (ISVLSI), 2012 IEEE Computer Society Annual Symposium on, 380--385. IEEE.

Digital Library

[40]

Shivaram Venkataraman, Niraj Tolia, Parthasarathy Ranganathan, and Roy H. Campbell. 2010. Redesigning data structures for non-volatile byte-addressable memory. In Proceedings of USENIX Conference on File and Storage Technologies (FAST’10).

[41]

Haris Volos, Andres Jaan Tack, and Michael M. Swift. 2011. Mnemosyne: Lightweight persistent memory. ACM SIGPLAN Notices 46, 3, 91--104.

Digital Library

[42]

Chundong Wang and Weng-Fai Wong. 2012. Observational wear leveling: An efficient algorithm for flash memory management. In Design Automation Conference (DAC). 2012, 235--242.

Digital Library

[43]

Chundong Wang and Weng-Fai Wong. 2013. SAW: System-assisted wear leveling on the write endurance of NAND flash devices. In Design Automation Conference (DAC). 2013, 1--9.

Digital Library

[44]

Xiaojian Wu and A. L. Reddy. 2011. SCMFS: A file system for storage class memory. In Proceedings of 2011 International Conference for High Performance Computing, Networking, Storage and Analysis, 39. ACM.

Digital Library

[45]

Chun Jason Xue, Youtao Zhang, Yiran Chen, Guangyu Sun, J. Jianhua Yang, and Hai Li. 2011. Emerging non-volatile memories: Opportunities and challenges. In Proceedings of the 7th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis. ACM, 325--334.

Digital Library

[46]

Jun Yang, Qingsong Wei, Cheng Chen, Chundong Wang, Khai Leong Yong, and Bingsheng He. 2015. Nv-tree: Reducing consistency cost for NVM-based single level systems. In Proceedings of the 13th USENIX Conference on File and Storage Technologies (FAST 15). 167--181.

[47]

Songping Yu, Nong Xiao, Mingzhu Deng, Yuxuan Xing, Fang Liu, Zhiping Cai, and Wei Chen. 2015. (December). WAlloc: An efficient wear-aware allocator for non-volatile main memory. In Proceedings of the 34th IEEE International Performance Computing and Communications Conference (IPCCC). December 14th-16th, 2015, Nanjing, China.

[48]

Ping Zhou, Bo Zhao, Jun Yang, and Youtao Zhang. 2009. A durable and energy efficient main memory using phase change memory technology. ACM SIGARCH Computer Architecture News 37, 3, 14--23. ACM.

Digital Library

Cited By

Feng XChen XZhuge QLiu DSha EXue C(2023)V-WAFA: An Endurance Variation Aware Fine-Grained Allocator for Persistent MemoryIEEE Transactions on Computers10.1109/TC.2022.319708672:4(998-1010)Online publication date: 1-Apr-2023
https://dl.acm.org/doi/10.1109/TC.2022.3197086
Zarubin MDamme PKrause AHabich DLehner WWassermann BMalka MChidambaram VRaz D(2021)SIMD-MIMD cocktail in a hybrid memory glassProceedings of the 14th ACM International Conference on Systems and Storage10.1145/3456727.3463782(1-12)Online publication date: 14-Jun-2021
https://dl.acm.org/doi/10.1145/3456727.3463782
Huang KLi SHuang LTan KMei H(2021) Lewat: A L ightweight, E fficient, and W ear- A ware T ransactional Persistent Memory System IEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2020.302838532:3(649-664)Online publication date: 1-Mar-2021
https://doi.org/10.1109/TPDS.2020.3028385
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Index Terms

Redesign the Memory Allocator for Non-Volatile Main Memory
1. Information systems
  1. Data management systems
    1. Database management system engines
      1. Parallel and distributed DBMSs
        Key-value stores
2. Software and its engineering
  1. Software organization and properties
    1. Contextual software domains
      1. Operating systems
        Memory management
        Virtual memory

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 13, Issue 3

Special Issue on Hardware and Algorithms for Learning On-a-chip and Special Issue on Alternative Computing Systems

July 2017

418 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/3051701

Editor:
Yuan Xie
University of California, Santa Barbara, USA

Issue’s Table of Contents

Copyright © 2017 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 14 April 2017

Accepted: 01 September 2016

Revised: 01 July 2016

Received: 01 April 2016

Published in JETC Volume 13, Issue 3

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National Natural Science Foundation of China
National High-Tech Research and Development Projects (863)

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Cited By

Feng XChen XZhuge QLiu DSha EXue C(2023)V-WAFA: An Endurance Variation Aware Fine-Grained Allocator for Persistent MemoryIEEE Transactions on Computers10.1109/TC.2022.319708672:4(998-1010)Online publication date: 1-Apr-2023
https://dl.acm.org/doi/10.1109/TC.2022.3197086
Zarubin MDamme PKrause AHabich DLehner WWassermann BMalka MChidambaram VRaz D(2021)SIMD-MIMD cocktail in a hybrid memory glassProceedings of the 14th ACM International Conference on Systems and Storage10.1145/3456727.3463782(1-12)Online publication date: 14-Jun-2021
https://dl.acm.org/doi/10.1145/3456727.3463782
Huang KLi SHuang LTan KMei H(2021) Lewat: A L ightweight, E fficient, and W ear- A ware T ransactional Persistent Memory System IEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2020.302838532:3(649-664)Online publication date: 1-Mar-2021
https://doi.org/10.1109/TPDS.2020.3028385
Arun KMishra DPanda B(2021)Empirical Analysis of Architectural Primitives for NVRAM Consistency2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics (HiPC)10.1109/HiPC53243.2021.00031(172-181)Online publication date: Dec-2021
https://doi.org/10.1109/HiPC53243.2021.00031
Zarubin MDamme PHabich DLehner W(2020)Polymorphic Compressed Replication of Columnar Data in Scale-Up Hybrid Memory SystemsProceedings of the 13th ACM International Systems and Storage Conference10.1145/3383669.3398283(98-110)Online publication date: 30-May-2020
https://dl.acm.org/doi/10.1145/3383669.3398283
Liu HLiu RLiao XJin HHe BZhang Y(2020)Object-Level Memory Allocation and Migration in Hybrid Memory SystemsIEEE Transactions on Computers10.1109/TC.2020.297313469:9(1401-1413)Online publication date: 1-Sep-2020
https://doi.org/10.1109/TC.2020.2973134
Chen XQingfeng ZSun QSha EGu SYang CXue C(2019)A Wear-Leveling-Aware Fine-Grained Allocator for Non-Volatile MemoryProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3317752(1-6)Online publication date: 2-Jun-2019
https://dl.acm.org/doi/10.1145/3316781.3317752
Huang KMei YHuang L(2019)Quail: Using NVM Write Monitor to Enable Transparent Wear-LevelingJournal of Systems Architecture10.1016/j.sysarc.2019.101658(101658)Online publication date: Oct-2019
https://doi.org/10.1016/j.sysarc.2019.101658
Mei YHuang KZhu YHuang L(2018)Statistical Monitoring for NVM Write2018 IEEE 24th International Conference on Parallel and Distributed Systems (ICPADS)10.1109/PADSW.2018.8644629(26-33)Online publication date: Dec-2018
https://doi.org/10.1109/PADSW.2018.8644629
Leidel J(2017)Bit Contiguous Memory Allocation for Processing In MemoryProceedings of the Workshop on Memory Centric Programming for HPC10.1145/3145617.3145618(11-19)Online publication date: 12-Nov-2017
https://dl.acm.org/doi/10.1145/3145617.3145618
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